Indium column of infrared focal plane detector and preparation method thereof

Abstract

The invention relates to a preparation method of an indium column of an infrared focal plane detector and the indium column prepared by the method. The method comprises the following steps of spin-coating thin photoresist on the surface of a chip, aligning to the center of a pixel or a reading unit electrode to carry out primary overlay, preparing a circular bottoming metal deposition hole, evaporating a composite metal film through electron beam evaporation, and obtaining a bottoming metal pattern array by adopting a wet stripping mode, secondly, spin-coating photoresist with medium thickness, aligning to the center of the bottoming metal pattern to carry out secondary overlay, preparing a square indium column deposition hole, depositing an indium film through vacuum thermal evaporation,and obtaining an indium column by adopting a wet stripping process, and finally, performing ball shrinkage in a formic acid atmosphere by adopting a reflux furnace to obtain the indium column array with a large height-width ratio. Compared with the prior art, the overall process difficulty is lower, the size of the prepared indium column can meet the requirement, the size uniformity is high, the surface of the indium column is uniform and smooth, and the consistency requirement of the inverted interconnection process can be completely met.

Description

technical field [0001] The invention relates to the technical field of infrared detectors, in particular to an indium column of an infrared focal plane detector and a preparation method thereof. Background technique [0002] The infrared focal plane array (IRFPA) detector has the functions of radiation sensitivity, charge storage and multiplex transmission. The number of detection units of the detector is more than 3 orders of magnitude higher than that of the first-generation detector, and the rapid electronic scanning imaging, identification and tracking of the target are realized through the Flip-Chip process (Flip-Chip) and the CMOS readout circuit technology. , tracking, staring imaging and other weapons and equipment are widely used. In recent years, people have gradually proposed the concept of the third-generation infrared detector with the technical characteristics of high detection rate, large area array, low cost, and multi-spectrum. Based on the second-generatio...

AI Technical Summary

Problems solved by technology

[0004] With the continuous increase of detector array size and imaging resolution on the application side, the distance between the center of the pixel is continuously reduced. In order to avoid the short circuit between the pixels due to the deformation of the indium column, the lateral dimension of the indium column is required to be reduced accordingly, resulting in direct growth. A sharp drop in the height of the obtained indium column

There are two problems: 1) As the height of the indium column decreases, the leveling tolerance of the chip interconnection decreases, and the slight leveling deviation during the interconnection will cause the interconnection failure of some areas on the side of the sensitive element, and the unevenness of the chip 2) The ability to alleviate the shear deformation caused by the thermal mismatch between the sensitive chip and the readout circuit chip deteriorates, the reliability of the device's thermal shock resistance decreases, and the fatigue life reduce

However, the existing traditional method to increase the height of the indium column usually adopts the thick glue photolithography process, but the thick glue process will lead to the deterioration of the size uniformity of the indium column, and with the increase of the area array density, the thick glue peeling becomes more difficult

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