Parallel-plate electrode plasma reactor having an inductive antenna and adjustable radial distribution of plasma ion density

Abstract

There is disclosed a plasma reactor for processing a semiconductor workpiece such as a wafer, including a chamber having an overhead ceiling with a three-dimensional shape such as a hemisphere or dome. The reactor further includes an inductive antenna over the ceiling which may be conformal or nonconformal in shape with the ceiling. The ceiling may be a semiconductor material so that it can function as both a window for the inductive field of the antenna as well as an electrode which can be grounded, or to which RF power may be applied or which may be allowed to float electrically. The reactor includes various features which allow the radial distribution of the plasma ion density across the wafer surface to be adjusted to an optimum distribution for processing uniformity across the wafer surface.

Description

1. Technical FieldThe invention relates to a plasma reactor having parallel plates for interposition therebetween of a workpiece to be processed, such as a semiconductor wafer, and an inductive coil antenna coupling RF power through one of the parallel plates into the interior of the reactor.2. Background ArtInductively coupled plasma reactors for processing microelectronic semiconductor wafers, such as the type of reactor disclosed in U.S. Pat. No. 4,948,458 to Ogle, enjoy important advantages over parallel-plate capacitively coupled plasma reactors. For example, inductively coupled plasma reactors achieve higher plasma ion densities (e.g., on the order of 10.sup.11 ions / cm.sup.3). Moreover, plasma ion density and plasma ion energy can be independently controlled in an inductively coupled plasma reactor by applying bias power to the workpiece or wafer. In contrast, capacitively coupled reactors typically provide relatively lower plasma ion densities (e.g., on the order of only 10.s...

AI Technical Summary

Benefits of technology

The design achieves uniform plasma processing across the entire wafer surface, widening the processing window, reducing consumable material costs, and maintaining plasma ion density, while preventing polymer deposition on chamber walls, thus enhancing etch selectivity and reducing operational interruptions.

Problems solved by technology

In contrast, capacitively coupled reactors typically provide relatively lower plasma ion densities (e.g., on the order of only 10.sup.10 ions / cm.sup.3) and generally cannot provide independent control of ion density and ion energy.

In contrast, parallel plate capacitively coupled plasma reactors typically stop etching at feature sizes on the order of about 0.25 microns, or at least exhibit inferior etch selectivity and etch profile due to an inferior ion-to-neutral density ratio.

However other materials such as aluminum oxide tend produce greater contamination than quartz due to sputtering.

However, the side wall is a poor ground plane, as it has many discontinuities, such as a slit valve for wafer ingress and egress, gas distribution ports or apparatus and so forth.

Such discontinuities give rise to non-uniform current distribution, which distort plasma ion distribution relative to the wafer surface.

The main problem with this type of plasma reactor is that it is liable to exhibit processing non-uniformity across the wafer surface.

The etch process near the wafer center is dependent upon such energetic electrons traveling from the vicinity of the chamber side wall and reaching the wafer center before recombining along the way by collisions with neutral species or ions, so that the etch process is not uniform across the wafer surface.

Moreover, introduction of the etchant precursor gas from the side and coupling of plasma source power from the side produces a non-uniform etchant ion / radical distribution favoring the side.

Many of the ions and radicals formed near side (over the wafer periphery) are consumed by etching the quartz side wall and are not available to etch the wafer center, while etchant ion / radical-forming energetic electrons generated near the side are lost to collisions with other species before reaching the wafer center, thus reducing the etchant ion concentration at the wafer center.

(It should be noted that the etching of the quartz side wall greatly increases the cost of operating the reactor because it consumes a very expensive item--the quartz side wall, which must be periodically replaced.)

The converse of the foregoing is that the relative plentitude of etchant ions and radicals near the wafer periphery can, under selected processing conditions, so impede polymerization as to impair etch selectivity, possibly leading to punchthrough of the underlying layer near the wafer periphery, in addition to causing a much higher etch rate at the wafer periphery.

A related problem is that the hotter electrons near the chamber side wall / wafer periphery providing more energetic plasma ions in that vicinity, coupled with the oxygen released by the etching of the quartz side wall mentioned above, erodes the edges of the photoresist mask near the wafer periphery.

Such erosion leads to faceting, in which the corners defined by the photoresist mask are etched, giving rise to an undesirable tapered etch profile.

Conversely, to avoid etch-stopping at the wafer center, the concentration of etchant ions in the plasma may be increased, which risks punchthrough or faceting near the wafer periphery.

Reducing the free fluorine concentration in this manner has the effect of not only decreasing etch rate but also enriching the carbon content of the polymer, thus increasing the effect of the polymer on the etch process to guard against punch through at the wafer periphery, but increasing the risk of etch stopping at the wafer center.

Conversely, increasing the free fluorine concentration not only increases the etch rate but also depletes the carbon content of the polymer, thus decreasing the effect of polymerization on the etch process, thus decreasing the risk of etch stopping at the wafer center but weakening the protection against punch through at the wafer periphery.

The problem with option (1) is that the polymer accumulated on the surface must be removed periodically, either by manual (wet) cleaning, by plasma (dry) cleaning, or by replacing the contaminated parts.

Otherwise, flaking of the polymer will occur, leading to contamination of the chamber.

Cleaning the reactor chamber requires the reactor operation be interrupted during the entire cleaning process, which represents a significant loss of productivity and increases the cost of operating the reactor.

Problems associated with the plasma cleaning process include not only loss of productivity but also loss of consumable materials in the chamber and contamination.

The problem with option (2) is that etching of chamber surfaces occurs because the surfaces are exposed.

For quartz surfaces, the etching can occur at such a high rate that the quartz parts must be replaced periodically at a significant cost in parts and lost production time.

There are, however, a number of potential problems which, if not resolved, could render the reactor of. FIG. 1 impractical.

First, there is the problem of whether the silicon ceiling 110 will block the RF induction field of the overhead coil antenna 145 from ever reaching the chamber 100.

Also, the RF induction field skin depth through the plasma in the chamber 100 may be greater than the chamber height (i.e., the wafer-top electrode gap), so that the RF induction power may not be efficiently coupled to the plasma.

Another problem is that the close proximity of the ceiling lo to the wafer 125 may be insufficient to separate the plasma sheath near the ceiling 110 from the plasma sheath near the underlying wafer 125, thereby shorting out the plasma from top to bottom.

Also, insertion of the silicon material of the ceiling 110 into the RF return path of the bias RF power generator 130 may occasion significant RF bias power losses.

Finally, there may not exist a suitable or practical range of resistivity values for the semiconductor window within which an RF inductive field can be coupled without undue loss or attenuation.

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