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Method for producing silicide nano-structure on insulated underlay

A nano-structured technology on an insulating substrate is applied in the manufacture of semiconductor/solid-state devices, photolithographic process exposure devices, electrical components, etc. Good repeatability, small scale effect

Inactive Publication Date: 2010-07-28
INST OF PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The object of the present invention is to: overcome the disadvantages that the size, shape and growth position of the existing methods for preparing metal silicide nanostructures are not easy to control, and provide a method that is easy to precisely control the size, shape and position of metal silicide nanostructures. A method for fabricating a nanoscale metal silicide structure on an insulating substrate that is compatible with the current integrated circuit manufacturing process. The method is simple and reliable. The fabrication of functional structures in nanodevices can also be used to study the physical and chemical properties of these nanostructures themselves

Method used

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  • Method for producing silicide nano-structure on insulated underlay
  • Method for producing silicide nano-structure on insulated underlay
  • Method for producing silicide nano-structure on insulated underlay

Examples

Experimental program
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Effect test

Embodiment 1

[0044] The platinum silicide nanostructure prepared in this embodiment can be found in figure 2 .

[0045] refer to figure 1 , the preparation method of this example is according to figure 1 The technological process is carried out, and the detailed description is as follows:

[0046] 1) Select an SOI substrate with a thin layer of single crystal silicon prepared by oxygen injection isolation technology, its crystal orientation is (100), the top layer silicon 2 of the SOI substrate is single crystal silicon, its thickness is 150 nanometers, and the insulating layer 1 is a silicon oxide layer with a thickness of 350 nanometers;

[0047] 2) ultrasonically cleaning the SOI substrate described in step 1) three times with acetone, alcohol and deionized water respectively, and drying it for later use;

[0048] 3) On the SOI substrate obtained in step 2) using a spin coater, coat a layer of positive electron beam photoresist PMMA, and bake it on a hot plate at 180° C. for 1 minu...

Embodiment 2

[0054] refer to figure 1 , make the nickel silicide nanostructure of this embodiment according to the flow process of the present invention:

[0055] 1) Spin-coat HSQ solution on a single crystal silicon substrate, bake at 250°C for 2 minutes, and then form an HSQ insulating dielectric layer with a thickness of about 150 nm, and then use magnetron sputtering to deposit a thin polysilicon layer with a thickness of about 100 nm. Nano.

[0056] 2) Spin-coat positive electron beam photoresist PMMA on the SOI substrate prepared in step 1), and bake it on a hot plate at 180° C. for 1 minute. The thickness of the photoresist is about 150 nanometers. A series of lines with a length of 100 micrometers and a width of 30 nanometers are exposed on the photoresist layer, and corresponding photoresist patterns are obtained after developing and fixing. The sample was put into an evaporation coating system, and metallic nickel was deposited by thermal evaporation with a thickness of 80 nano...

Embodiment 3

[0061] refer to figure 1 , the technical process of making titanium disilicide nanostructure in this embodiment is according to figure 1 As shown, the specific steps are as follows:

[0062] 1) An SOI substrate with a thin single crystal silicon layer prepared by oxygen injection isolation technology is selected, the crystal orientation is (100), the thickness of the top silicon layer is 100 nanometers, and the thickness of the silicon oxide buried layer is 350 nanometers.

[0063] 2) Spin-coat positive electron beam photoresist PMMA on the substrate, bake at 180° C. for 1 minute, the thickness of the photoresist is about 100 nanometers, and put it into a Raith 150 electron beam exposure system for exposure. The designed figure is a line with a length of 50 microns and a width of 50 nanometers, and corresponding nano-channels can be obtained on the photoresist layer after developing and fixing. Then put the sample into an evaporation coating system, and deposit titanium meta...

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Abstract

The invention relates to a method for manufacturing a metal silicide nanostructure on an insulating substrate, comprising the following steps: an SOI substrate is subjected to ultrasonic cleaning; photoresist is coated; a designed nanostructure pattern is exposed on a photoresist layer; after developing and fixing, a corresponding photoresist pattern is obtained; a layer of metal film which can form a metal silicide is deposited on a sample with the photoresist pattern; the sample is immersed in photoresist-removing solution for separation, thus leading the metal nanostructure to remain on the top-layer silicon film of the SOI substrate; the metal nanostructure is later put in a reactive ion etching system for etching, thereby transferring the metal nanostructure pattern onto the top-layer silicon film and forming a metal / silicon two-layer structure; by high-temperature annealing, solid-state reaction is carried out to the metal and the silicon so as to form the metal silicide; in accordance with the type of metal silicide, corresponding corrosive is selected for removing the unreacted metal and leaving the metal silicide nanostructure. The invention has simple and reliable process, high precision and good repeatability, and is fully compatible with the semiconductor technology.

Description

Technical field [0001] The present invention relates to a method for making a metal silicide nanostructure, in particular to a silicide nanostructure whose shape and growth position are completely controllable and fully compatible with the manufacturing process of integrated circuits, in which metal silicide is directly formed on an insulating substrate. Methods of fabricating nanostructures. Background technique [0002] Metal silicide has the characteristics of low resistivity, high thermal stability, good resistance to electromigration and small mean free path of carriers. It has good application prospects in integrated circuits and micro-nano electronic devices, such as as interconnects. wires, source, drain and gate etc. Fabrication of nanoscale metal silicides is becoming more and more important as device sizes decrease. Nanotechnology can adopt both "top-down" and "bottom-up" technical routes when manufacturing specific functional devices, and the production of meta...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/00H01L21/02H01L21/3205H01L21/768H01L21/84G03F7/20
Inventor 罗强顾长志李云龙李俊杰杨海方金爱子
Owner INST OF PHYSICS - CHINESE ACAD OF SCI