Vertically structured LED chip preparation method

Abstract

The invention discloses a vertically structured LED chip preparation method. The method comprises the steps of 1) obtaining an LED epitaxial layer of an LED structure on a heterogeneous substrate according to the epitaxial growth method; 2) forming multiple interlaced grooves on the upper surface of the LED epitaxial layer through the laser machining process so as to form a cylindrically surrounded gallium nitride high-pressure gas release sacrificial region; 3) successively preparing an ohmic contact layer and a first bonding material layer on the LED epitaxial layer, and preparing a second bonding material layer on a bonding substrate; 4) bonding the first bonding material layer on the LED epitaxial layer and the second bonding material layer on the bonding substrate together, and removing the heterogeneous substrate through the laser lift-off process; 5) etching the lifted-off LED epitaxial layer onto an N-GaN surface, removing the gallium nitride material outside the cylindrically surrounded gallium nitride high-pressure gas release sacrificial region and the effective region of the LED epitaxial layer based on the wet etching technology, and finally completing the preparation of a passivation layer and an N electrode. In this way, a vertically structured LED chip can be obtained.

Description

Technical field: [0001] The invention belongs to the technical field of light-emitting diodes, in particular to the field of preparing vertical-structure LED chips based on laser lift-off technology. Background technique: [0002] Since the LED white light lighting technology entered a rapid development stage in the 1990s, the LED application market has exceeded hundreds of billions of yuan. At the same time, with the rapid development of AlGaN ultraviolet LED / LD devices in the past two years, it has Application fields such as sterilization and semiconductor solid-state lasers also show good market development prospects. The most common LED products adopt a horizontal structure design, the current flows through the light-emitting area of ​​the LED in the horizontal direction, and electrons are injected laterally from one electrode to the other, resulting in uneven distribution of current density on the way, resulting in current congestion effect resulting in uneven luminesce...

AI Technical Summary

Problems solved by technology

Compared with horizontal structure LED chips, since vertical structure LED chips need substrate stripping and transfer, electrode pattern processing, U-GaN gallium nitride material etching area definition, passivation protection layer, etc., the vertical chip process is relatively horizontal. chip complex

[0003] Due to the particularity of the product, the vertical structure chip must realize the complete division of the epitaxial layer material between single chips. At present, it is mostly realized by plasma dry deep etching or laser ablation aisle combined with high temperature wet etching. At the same time, in order to avoid Chips are affected by the impact of high-pressure gas generated at the moment of laser lift-off, and it is necessary to reserve a deep etching path or laser ablation and its buffer area with a width of more than 100um. out reduction

However, there are still other process problems and hidden dangers in the above technologies. For example, the dry deep etching process of gallium nitride takes a long time and has low productivity, and it is difficult to control the shape of the etched sidewall to obtain a trapezoidal sidewall structure. The collapse of the sidewall during etching can cause the appearance of the chip to deform and even cause leakage. Although the laser ablation and high-temperature wet etching process can solve the above sidewall shape control problem, due to the gallium nitride between the unit areas of the chip in the laser ablation process The material distance is still relatively close to about 7-20um (laser line width limit), and there is still a hidden danger of chip leakage caused by the impact of high-pressure gas generated at the moment of peeling off. When GaN material is used in a wide inactive area, since only one interface of the ablation channel opening is relatively small, it is easy to corrode the GaN material uncleanly, which may lead to chip leakage if the appearance is abnormal and severe.

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