Self-alignment grid-based GaN ultrahigh-frequency device and fabrication method thereof
A self-alignment, ultra-high-frequency technology, applied in the field of microelectronics, can solve the problem of weakened gate control capability and device withstand voltage capability, etching accuracy of sidewall expansion of etched grooves, poor uniformity of on-chip devices, etc. problems, to achieve the effect of suppressing current collapse, ensuring power conversion efficiency, and improving yield
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[0035] In the first embodiment, a high-gain UHF GaN device structure with a groove depth of 5 nm, a gate dielectric layer thickness of 4 nm, a passivation layer thickness of 2 nm, and a gate neck height of 160 nm is fabricated on a SiC substrate.
[0036] Step 1, fabricating source electrode 8 and drain electrode 9 on the GaN buffer layer 3 of the epitaxial substrate, such as figure 2 (b).
[0037] 1a) Lithography source electrode pattern and drain electrode pattern on AlGaN barrier layer 5:
[0038] 1a-1) Place the epitaxial substrate on a hot plate at 200°C and bake for 5 minutes to remove moisture from the substrate;
[0039] 1a-2) The peeling glue PMGI-SF6 is applied and spun glue on the AlGaN barrier layer 5. The spun glue thickness is about 350nm at 2000 rpm, and the formed sample is baked on a 200 ℃ hot plate Bake for 5min;
[0040] 1a-3) Apply the photoresist EPI621 and spin the glue on the peeling glue, the thickness of the glue is 770nm at 5000rpm, and then put the sample o...
Example Embodiment
[0094] In the second embodiment, a high-gain UHF GaN device structure with a groove depth of 12 nm, a gate dielectric layer thickness of 4 nm, and a passivation layer thickness of 2 nm is fabricated on a Si substrate.
[0095] Step one, fabricate source electrode 8 and drain electrode 9 on the GaN buffer layer 3 of the epitaxial substrate, such as figure 2 (b).
[0096] 1.1) Lithography source electrode pattern and drain electrode pattern on AlGaN barrier layer 5:
[0097] The specific implementation of this step is the same as step 1a) in the first embodiment;
[0098] 1.2) Use electron beam evaporation to evaporate the metal on the photoetched area of the electrode to make the electrode:
[0099] The specific implementation of this step is the same as step 1b) in the first embodiment;
[0100] 1.3) Perform rapid thermal annealing treatment on the sample:
[0101] Put the sample after ohmic metal evaporation and peeling into a rapid thermal annealing furnace, 2 Perform rapid thermal ...
Example Embodiment
[0134] The third embodiment is a high-gain UHF GaN device structure fabricated on a sapphire substrate with a groove depth of 12 nm, a gate dielectric layer thickness of 8 nm, and a passivation layer thickness of 6 nm.
[0135] Step A, fabricating source electrode 8 and drain electrode 9 on the GaN buffer layer 3 of the epitaxial substrate, such as figure 2 (b).
[0136] A-1) Lithography source electrode pattern and drain electrode pattern on the AGaN barrier layer 5:
[0137] The specific implementation of this step is the same as step 1a) in the first embodiment;
[0138] A-2) On the AlGaN barrier layer 5 in the source electrode region and the drain electrode region and the source electrode region and the drain electrode region
[0139] The source electrode 8 and the drain electrode 9 are evaporated on the outer photoresist:
[0140] The specific implementation of this step is the same as step 1b) in the first embodiment;
[0141] A-3) Perform rapid thermal annealing treatment on the ...
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