Transmission electron microscope high-resolution in-situ liquid phase temperature change chip and production method thereof
An in-situ liquid phase and transmission electron microscopy technology, which is applied in the preparation of test samples, material analysis using radiation, material analysis using wave/particle radiation, etc., can solve the limitations, single state of matter, and inability to achieve alternate transformation And other issues
Pending Publication Date: 2020-10-23
XIAMEN CHIP NOVA TECH CO LTD
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AI-Extracted Technical Summary
Problems solved by technology
Limited by the frozen state of the sample, we can only observe a single static state when the sample is frozen, and cannot observe the entire three-dimensional dynamic change process of the sample in the real solution environ...
Abstract
The invention discloses a transmission electron microscope high-resolution in-situ liquid phase temperature change chip and a production method thereof. A lower piece of the chip is provided with a supporting layer, a freezing layer, an insulating layer, a heating layer, an insulating layer, a hole channel and a central window; the freezing layer is provided with four contact electrodes, a semiconductor refrigeration film and a conductive metal film; in an area where the central window and the semiconductor refrigeration film are located, the hole channel is reserved after silicon is corroded,and the supporting layer covers the hole channel; the semiconductor refrigeration film and the conductive metal film are both arranged on the supporting layer; a circle of metal film is deposited onthe supporting layer with the central window as a center; a front end of the semiconductor refrigeration film is lapped on the metal film, and the rear end is connected with the four contact electrodes; the freezing layer and the heating layer are separated through the insulating layer; the heating layer is provided with two contact electrodes and a spiral annular heating wire, and the heating wire is located above the semiconductor refrigeration film; and a plurality of small holes are formed in the central window. The chip is large in temperature control range, high in temperature changing speed and capable of achieving in-situ dynamic observation.
Application Domain
Preparing sample for investigationMaterial analysis by transmitting radiation
Technology Topic
PhysicsElectrically conductive +7
Image
Examples
- Experimental program(4)
Example Embodiment
[0145] The preparation method of the upper sheet is as follows:
[0146] S1. Using the photolithography process, the central window pattern is transferred from the photolithography mask to the Si (100) wafer A with silicon nitride or silicon oxide layers on both sides, and then developed in the positive resist developing solution to obtain the wafer A-1;
[0147] Preferably, the photolithography process is exposed in the hard contact mode of the ultraviolet lithography machine; the thickness of the silicon nitride or silicon oxide layer is 5-200nm; the development time is 50s;
[0148] More preferably, the exposure time is 15s;
[0149] S2. Utilize the reactive ion etching process to etch a central window on the silicon nitride layer on the front side of the wafer A-1, then put the front side of the wafer A-1 up into acetone to soak, and finally use a large amount of Rinse with deionized water, remove the photoresist, and obtain wafer A-2;
[0150] S3. Using the ultraviolet laser direct writing process, the small hole pattern of the central window is transferred from the photolithography mask to the front side of the wafer A-2, and then developed in a positive photolithographic developer, and then rinsed with deionized water to clean the surface. Obtain wafer A-3;
[0151] Preferably, the developing time is 50s;
[0152] S4. Using the reactive ion etching process, etch the thickness of the silicon nitride at the small hole on the back of the wafer A-3 to 10nm-15nm, and then place the front side of the wafer A-3 upward and successively soak in acetone , and finally rinsed with acetone to remove the photoresist to obtain wafer A-4;
[0153] Preferably, the size of the small hole is 0.5 μm-5 μm;
[0154] S5. Put the back side of the wafer A-4 upward into a potassium hydroxide solution for wet etching, etch until only the film window is left on the front side, take out the wafer A-4 and rinse it with a large amount of deionized water to obtain a wafer. Circle A-5;
[0155] Preferably, the mass percent concentration of the potassium hydroxide solution is 20%; the etching temperature is 80° C., and the time is 1.5-4 hours;
[0156] More preferably, the etching time is 2h;
[0157] S6. Using the photolithography process, transfer the bonding layer pattern from the photolithography mask to the front side of the wafer A-5, and then develop it in a positive resist developer, and then rinse and clean the surface with deionized water to obtain wafer A -6;
[0158] Preferably, the photolithography process is exposed in the hard contact mode of the ultraviolet lithography machine; the development time is 50s;
[0159] More preferably, the exposure time is 15s;
[0160] S7. Utilizing the thermal evaporation coating process, evaporating the metal bonding material on the wafer A-6 to form a metal bonding layer, and obtaining the wafer A-7;
[0161] Preferably, the metal is a metal with a low melting point; the thickness of the metal bonding layer is 50-2000nm;
[0162] More preferably, the metal is In, Sn or Al;
[0163] S8. Carry out laser scribing of wafer A-7, and divide it into independent chips to be loaded;
[0164] The preparation method of the lower sheet is as follows:
[0165] S1. Prepare Si(100) wafer B with silicon nitride or silicon oxide layers on both sides;
[0166] Preferably, the thickness of the silicon nitride or silicon oxide layer is 5-200nm;
[0167] S2. Using the photolithography process, transfer the carrier film pattern in the frozen area from the photolithography mask to the front side of the wafer, and then develop it in a positive photoresist developer, and then clean the surface with deionized water to obtain wafer B-1;
[0168]Preferably, the photolithography process is exposed under the hard contact mode of the ultraviolet lithography machine; the photoresist used in the photolithography process is AZ5214E; the developing time is 65s;
[0169] More preferably, the exposure time is 20s;
[0170] S3. Using reactive ion etching process, etch the central window on the silicon nitride layer on the back of wafer B-1, etch away the silicon nitride or silicon oxide in the frozen area, and then turn the back of the wafer up Soak in acetone successively, and finally rinse with acetone to remove the photoresist to obtain wafer B-2;
[0171] Preferably, the semiconductor refrigeration film in the frozen layer has a length of 0.2-0.8mm, a width of 0.1-0.4mm, and a thickness of 50nm-500nm;
[0172] S4. Put the back side of the wafer B-2 upward into the potassium hydroxide solution for wet etching until the exposed substrate silicon is completely etched, take out the wafer 2, rinse it with a large amount of deionized water, and then dry it to obtain Wafer B-3;
[0173] Preferably, the mass percent concentration of the potassium hydroxide solution is 20%; the etching temperature is 70-90°C, and the etching time is 1.5-4h;
[0174] More preferably, the etching temperature is 80°C; the etching time is 2h;
[0175] S5. Using the PECVD process, silicon oxide or silicon nitride is grown on the front side of the silicon wafer after wafer B-3 has been etched to obtain wafer B-4;
[0176] Preferably, the thickness of silicon oxide or silicon nitride is 0.5-5 μm;
[0177] S6. Using the photolithography process, the metal thin film pattern is transferred from the photolithography mask to the front side of the wafer B-4, and then developed in the positive resist developer, and then rinsed with deionized water to clean the surface to obtain the wafer B-4. 5;
[0178] S7. Use DC magnetron sputtering to sputter a layer of conductive metal film on the front of wafer B-5, then put the front of wafer B-7 into acetone to soak and peel off, and finally rinse with deionized water , remove the photoresist, leave the metal film, and obtain wafer B-6;
[0179] Preferably, the conductive metal is gold, silver or copper, with a thickness of 50nm-300nm;
[0180] S8. Using the photolithography process, the n-type semiconductor pattern is transferred from the photolithography mask to the front side of the wafer B-6, and then developed in a positive resist developer, and then rinsed with deionized water to clean the surface to obtain a wafer B -7;
[0181] Preferably, the n-type semiconductor is n-type bismuth telluride, n-type silicon germanium, n-type lead telluride, n-type zinc telluride or n-type bismuth selenide;
[0182] S9. Use radio frequency magnetron sputtering to sputter a layer of n-type semiconductor cooling film on the front of wafer B-7, then put the front of wafer B-7 into acetone to soak and peel off, and finally use deionization Rinse with water, remove the photoresist, leave an n-type semiconductor cooling film, and obtain wafer B-8;
[0183] Preferably, the n-type semiconductor is n-type bismuth telluride, n-type silicon germanium, n-type lead telluride, n-type zinc telluride or n-type bismuth selenide;
[0184] S10. Using a photolithography process, transfer the p-type semiconductor pattern from the photolithography mask to the front side of wafer B-8, then develop it in a positive resist developer, and then rinse and clean the surface with deionized water to obtain wafer B -9;
[0185] Preferably, the p-type semiconductor is polysilicon, p-type bismuth telluride, p-type silicon germanium or p-type antimony telluride;
[0186] S11. Use radio frequency magnetron sputtering to sputter a layer of p-type semiconductor cooling film on the front of wafer B-9, then put the front of wafer B-9 into acetone to soak and peel off, and finally use deionization Rinse with water, remove the photoresist, leave a p-type semiconductor cooling film, and obtain wafer B-10;
[0187] Preferably, the p-type semiconductor is bismuth telluride or antimony telluride;
[0188] S12. Using the PECVD process, a layer of silicon nitride or silicon oxide or aluminum oxide is grown on the semiconductor cooling film of the wafer B-10 as an insulating layer to obtain a wafer B-11;
[0189] Preferably, the thickness of the insulating layer is 30-150nm;
[0190] S13. Evaporate a layer of metal heating wire on the front of wafer B-11 by electron beam evaporation, then put the front of wafer B-11 into acetone to soak and peel off, and finally rinse with deionized water to remove Photoresist, leaving the metal heating wire to obtain wafer B-12;
[0191] Preferably, the metal of the metal heating wire is metal gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metallic molybdenum carbide; the thickness of the metal heating wire is 50nm-500nm;
[0192] S14. Using the PECVD process, a layer of silicon nitride or silicon oxide or aluminum oxide is grown on the metal heating wire of the wafer B-12 as an insulating layer to obtain a wafer B-13;
[0193] Preferably, the thickness of the insulating layer is 30-150nm;
[0194] S15. Using the UV laser direct writing lithography process, the small hole pattern of the central window is transferred from the photolithography mask to the front side of the wafer B-13, and then developed in a positive photoresist developer, and then rinsed and cleaned with deionized water Surface, obtain wafer B-14;
[0195] Preferably, the photoresist used in the ultraviolet laser direct writing process is AZ5214E; the output power is 260W/us;
[0196] S16. Utilize the reactive ion etching process to etch silicon nitride or silicon oxide at the small hole on the back side of the wafer B-14, then put the front side of the wafer B-14 into acetone to soak, and finally use Rinse with acetone, remove the photoresist, and obtain wafer B-15;
[0197] Preferably, the size of the small hole is 0.5 μm-5 μm;
[0198] S17. Perform laser scribing on the wafer B-15, and divide it into independent chips to be the next chip;
[0199] Assembly: Assemble the obtained upper and lower plates under a microscope, and align the central windows of the upper and lower plates.
[0200] according to Figure 1-Figure 6 structure, the fabrication of the following chip was carried out. Among them, 1 is the high-resolution in-situ liquid phase temperature change chip for transmission electron microscopy; 2 is the upper chip; 3 is the lower chip; 4 is the metal bonding layer; 5 is the center window; 51 is the center window of the upper chip; 52 is the center window of the lower chip; 6 is a small hole; 7 is a sample injection port; 8 is a heating layer, 9 is a heating wire; 10 is the central area of the heating wire; 11 is four contact electrodes; 12 is a silicon substrate; 13, 14 are silicon nitride 15 is a support layer; 16 is an insulating layer 1; 17 is an insulating layer 2; 18 is a channel; 19 is a semiconductor refrigeration film; 191 is an n-type semiconductor refrigeration film; 192 is a p-type semiconductor refrigeration film; 20 is conductive metal film.
Example Embodiment
[0201] Example 1: Preparation of a high-resolution in-situ liquid-phase temperature-changing chip by transmission electron microscopy
[0202] The preparation method of the upper sheet is,
[0203] S1. Using the photolithography process (exposure for 15s in the hard contact mode of the UV lithography machine), transfer the central window pattern from the photolithography mask to the Si(100) crystal with silicon nitride or silicon oxide layers on both sides. Circle A is then developed in positive photoresist developer for 50s to obtain wafer A-1; the thickness of the silicon nitride or silicon oxide layer is 5-200nm;
[0204] S2. Utilize the reactive ion etching process to etch a central window on the silicon nitride layer on the front side of the wafer A-1, then put the front side of the wafer A-1 up into acetone to soak, and finally use a large amount of Rinse with deionized water, remove the photoresist, and obtain wafer A-2;
[0205] S3. Using the ultraviolet laser direct writing process, transfer the small hole pattern of the central window from the photolithography mask to the front side of wafer A-2, and then develop it in a positive photolithographic developer for 50 seconds, and then rinse and clean the surface with deionized water , to obtain wafer A-3;
[0206] S4. Using a reactive ion etching process, etch the thickness of the silicon nitride at the small hole on the back of the wafer A-3 to 10nm-15nm, the size of the small hole is 0.5μm-5μm; then the wafer A The front side of -3 is put into acetone and soaked successively, and finally rinsed with acetone to remove the photoresist to obtain wafer A-4;
[0207] S5. Put the back side of the wafer A-4 upward into a potassium hydroxide solution with a mass percent concentration of 20% for wet etching (the etching temperature is 80° C., and the time is 2 h), and etch until the front side is only Leave the film window, take out the wafer A-4 and rinse it with a large amount of deionized water to obtain the wafer A-5;
[0208] S6. Using the photolithography process (15s exposure in the hard contact mode of the ultraviolet lithography machine), the bonding layer pattern is transferred from the photolithography mask to the front side of the wafer A-5, and then developed in the positive photoresist developer for 50s , and then rinse and clean the surface with deionized water to obtain wafer A-6;
[0209] S7. Using the thermal evaporation coating process, the wafer A-6 is vapor-deposited with a metal bonding material to form a metal bonding layer with a thickness of 50-2000nm to obtain a wafer A-7; the metal is a low-melting-point metal; a low-melting-point metal Be In, Sn or Al;
[0210] S8. Carry out laser scribing of wafer A-7, and divide it into independent chips to be loaded;
[0211] The preparation method of the lower sheet is as follows:
[0212] S1. Prepare Si(100) wafer B with silicon nitride or silicon oxide layers on both sides;
[0213] Preferably, the thickness of the silicon nitride or silicon oxide layer is 5-200nm;
[0214] S2. Using the photolithography process (exposure for 20s in the hard contact mode of the ultraviolet lithography machine, and the photoresist is AZ5214E), transfer the carrier film pattern in the freezing area from the photolithography mask to the front side of the above-mentioned wafer, and then place it on the positive photoresist Develop in the developer solution for 65s, and then wash the surface with deionized water to obtain wafer B-1;
[0215] S3. Using reactive ion etching process, etch the central window on the silicon nitride layer on the back of wafer B-1, etch away the silicon nitride or silicon oxide in the frozen area, and then turn the back of the wafer up Soak in acetone successively, and finally rinse with acetone, remove the photoresist, and obtain wafer B-2; make the length of the semiconductor refrigeration film in the frozen layer 0.2-0.8mm, width 0.1-0.4mm, and thickness 50nm -500nm;
[0216] S4. Put the back side of the wafer B-2 upwards into a potassium hydroxide solution with a mass percent concentration of 20% for wet etching (the etching temperature is 80° C., and the etching time is 2 h), until bare After the leaked base silicon is completely etched, the wafer 2 is taken out, rinsed with a large amount of deionized water, and dried to obtain wafer B-3;
[0217] S5. Using the PECVD process, grow silicon oxide or silicon nitride with a thickness of 0.5-5 μm on the front side of the etched silicon wafer of wafer B-3 to obtain wafer B-4;
[0218]S6. Using the photolithography process, the metal thin film pattern is transferred from the photolithography mask to the front side of the wafer B-4, and then developed in the positive resist developer, and then rinsed with deionized water to clean the surface to obtain the wafer B-4. 5;
[0219] S7. Use DC magnetron sputtering to sputter a layer of conductive metal film on the front of wafer B-5, then put the front of wafer B-7 into acetone to soak and peel off, and finally rinse with deionized water , removing the photoresist, leaving a metal film to obtain wafer B-6; the conductive metal is gold, silver or copper, with a thickness of 50nm-300nm;
[0220] S8. Using the photolithography process, the n-type semiconductor pattern is transferred from the photolithography mask to the front side of the wafer B-6, and then developed in a positive resist developer, and then rinsed with deionized water to clean the surface to obtain a wafer B -7; The n-type semiconductor uses n-type bismuth telluride, n-type silicon germanide, n-type lead telluride, n-type zinc telluride or n-type bismuth selenide;
[0221] S9. Use radio frequency magnetron sputtering to sputter a layer of n-type semiconductor cooling film on the front of wafer B-7, then put the front of wafer B-7 into acetone to soak and peel off, and finally use deionization Rinse with water, remove the photoresist, and leave an n-type semiconductor cooling film to obtain wafer B-8; the n-type semiconductor uses n-type bismuth telluride, n-type silicon germanide, n-type lead telluride, n-type type zinc telluride or n-type bismuth selenide;
[0222] S10. Using a photolithography process, transfer the p-type semiconductor pattern from the photolithography mask to the front side of wafer B-8, then develop it in a positive resist developer, and then rinse and clean the surface with deionized water to obtain wafer B -9; the p-type semiconductor is polysilicon, p-type bismuth telluride, p-type silicon germanium or p-type antimony telluride;
[0223] S11. Use radio frequency magnetron sputtering to sputter a layer of p-type semiconductor cooling film on the front of wafer B-9, then put the front of wafer B-9 into acetone to soak and peel off, and finally use deionization Rinse with water, remove the photoresist, and leave a p-type semiconductor cooling film to obtain wafer B-10; the p-type semiconductor uses bismuth telluride or antimony telluride;
[0224] S12. Using the PECVD process, a layer of silicon nitride or silicon oxide or aluminum oxide with a thickness of 30-150 nm is grown on the semiconductor cooling film of the wafer B-10 as an insulating layer to obtain a wafer B-11;
[0225] S13. Evaporate a layer of metal heating wire on the front of wafer B-11 by electron beam evaporation, then put the front of wafer B-11 into acetone to soak and peel off, and finally rinse with deionized water to remove photoresist, leaving the metal heating wire to obtain wafer B-12; the metal of the metal heating wire is metal gold, platinum, palladium, rhodium, molybdenum, tungsten, platinum-rhodium alloy or non-metallic molybdenum carbide; the The thickness of the metal heating wire is 50nm-500nm;
[0226] S14. Using the PECVD process, grow a layer of silicon nitride or silicon oxide or aluminum oxide with a thickness of 30-150 nm on the metal heating wire of the wafer B-12 as an insulating layer to obtain a wafer B-13;
[0227] S15. Utilize the ultraviolet laser direct writing lithography process (the photoresist is AZ5214E; the output power is 260W/us), transfer the small hole pattern of the central window from the photolithography mask to the front of the wafer B-13, and then Develop in positive photolithographic developer, then rinse and clean the surface with deionized water to obtain wafer B-14;
[0228] S16. Utilize the reactive ion etching process to etch the silicon nitride or silicon oxide at the small hole (the size of the small hole is 0.5 μm-5 μm) on the back side of the wafer B-14, and then the wafer B-14 Put the face up into acetone for soaking, and finally rinse with acetone to remove the photoresist to obtain wafer B-15;
[0229] S17. Perform laser scribing on the wafer B-15, and divide it into independent chips to be the next chip;
[0230] Assembly: Assemble the obtained upper and lower plates under a microscope, and align the central windows of the upper and lower plates.
Example Embodiment
[0231] Example 2: Use of a high-resolution in-situ liquid-phase temperature-changing chip for transmission electron microscopy
[0232] Inject an aqueous solution of supersaturated calcium hydroxide (the solution contains a small amount of calcium hydroxide particles) into the sample injection port of the transmission electron microscope high-resolution in-situ liquid phase temperature change chip prepared in Example 1. Temperature software, set the chip temperature to -30°C, get Figure 7 Electron microscope image from Figure 7 It can be seen from A and B that as the temperature rises, the solution temperature rises, the solubility of the solute gradually decreases, and calcium hydroxide solids are precipitated, and the nanoparticles are calcium hydroxide solids that are precipitated during the temperature rise of the chip. By controlling the amount of energization of the chip, the temperature of the solution in the chip can be monitored and controlled in real time. This temperature range can be reached for liquid phase reactions.
PUM
| Property | Measurement | Unit |
| Dimensions | 2.0 ~ 10.0 | mm |
| Dimensions | 4.0 ~ 8.0 | mm |
| Thickness | 50.0 ~ 2000.0 | nm |
Description & Claims & Application Information
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