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Mask structure of copper electroplating grid line for HAC battery and preparation method of mask structure

A technology of copper electroplating and masking, which is applied in the manufacture of circuits, electrical components, and final products, can solve the problem that the anti-reflection effect cannot be optimal, achieve suitable scale production, improve the anti-reflection effect, and save a lot of cost Effect

Inactive Publication Date: 2020-05-08
江西昌大高新能源材料技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In addition, the transparent conductive oxide layer (transparent conductive oxide hereinafter referred to as TCO) on the surface of HAC solar cells is mainly made of indium oxide as the main material, such as tin-doped indium trioxide (hereinafter referred to as ITO), which must take into account both conductivity and anti-reflection effects , so that the anti-reflection effect cannot be optimized, which also limits the improvement of the performance of HAC solar cells. If the anti-reflection effect can be improved by the method of composite film layer, it is also very meaningful to improve the performance of HAC solar cells.

Method used

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  • Mask structure of copper electroplating grid line for HAC battery and preparation method of mask structure
  • Mask structure of copper electroplating grid line for HAC battery and preparation method of mask structure
  • Mask structure of copper electroplating grid line for HAC battery and preparation method of mask structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] Embodiment 1 silicon nitride as mask layer

[0025] Deposit a layer of ITO film on both surfaces of the crystalline silicon wafer deposited with amorphous silicon as the TCO layer, and then use the plate PECVD method to deposit a layer of silicon nitride on each of the two ITO film surfaces as the copper plating grid line. Mask layer; the mask is slotted by placing a hard mask on the surface of the cell during coating;

[0026] When the silicon nitride film is deposited, a solid-state mask is used to form a thin grid line pattern with a line width of 40 μm and a line spacing of 400 μm. The thin grid line is prepared by electroplating. The thickness of the copper electroplating grid line is 0.2-20 μm. The preparation process Discontinuity is allowed in the copper plating grid line;

[0027] The silicon nitride mask layer remains on the surface of the battery sheet after the preparation of the copper electroplating grid lines, and is not removed.

[0028] Several groups...

Embodiment 2

[0033] Embodiment 2 silicon oxide as mask layer

[0034] Deposit a layer of ITO film on both surfaces of the crystalline silicon wafer deposited with amorphous silicon as the TCO layer, and then use the plate PECVD method to deposit a layer of silicon oxide on each of the two ITO film surfaces as a mask for the copper electroplating gate line. The film layer; and after the coating is finished, the mask is notched by etching with an etchant;

[0035] After the deposition of the silicon oxide film, the silicon oxide etchant is printed by screen printing to etch the silicon oxide film. In this process, only the mask material is etched and the TCO material is not etched, forming a line width of 30 μm and a line spacing of 1 mm. The thin grid line pattern and the main grid line pattern with a line width of 1.0 mm are prepared by electroplating. The thickness of the copper electroplating grid line is 0.2-20 μm, and the copper electroplating grid line is allowed to have discontinuity...

Embodiment 3

[0042] Embodiment 3 silicon nitride-silicon oxide as mask layer

[0043] Deposit one layer of ITO film on the two surfaces of the crystalline silicon wafer deposited with amorphous silicon as the TCO layer, and then use the hot wire CVD method to deposit a layer of silicon nitride film on the two ITO film surfaces, and then separately Deposit a layer of silicon oxide film as a mask layer for copper electroplating gate lines;

[0044] After the film deposition, the silicon oxide etchant was printed by screen printing to etch the silicon oxide film to form a fine grid line pattern with a line width of 10 μm and a line spacing of 1 mm, and a main grid line pattern with a line width of 1.0 mm. , using the electroplating method to prepare fine grid lines, the thickness of the copper electroplated grid lines is 0.2-20 μm, and the copper electroplated grid lines are allowed to be discontinuous during the preparation process;

[0045] Several groups of example samples were analyzed, ...

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Abstract

The invention discloses a mask structure of a copper electroplating grid line for an HAC battery. According to the invention, silicon nitride or silicon oxide or silicon nitride-silicon oxide composite films are prepared on the surfaces of TCO layers at the two sides of a battery piece to serve as masks of a copper electroplating grid line, and the masks are left on the surface of the battery piece after the copper electroplating grid line is prepared and are not removed; and the refractive indexes of the mask and the TCO are matched with each other. The invention further discloses a preparation method of the mask of the copper electroplating grid line for the HAC battery. ITO thin films are deposited on the two surfaces of the crystalline silicon wafer deposited with the amorphous siliconrespectively to serve as TCO layers; silicon nitride or silicon oxide or silicon nitride-silicon oxide composite films are deposited on the surfaces of the two ITO films by adopting a plate type PECVD method or a hot filament CVD method to serve as mask layers of the copper electroplating grid line, and the masks are left on the surfaces of the battery piece after the copper electroplating grid line is prepared without removing the masks. According to the method, the mask of the copper-plated grid line is prepared by a method shorter than a photoetching process, and the obtained mask is reserved on the surface of the cell after the grid line is prepared, so the anti-reflection effect of TCO is improved.

Description

technical field [0001] The invention belongs to the field of solar cells and semiconductor devices, and relates to the technology of crystalline silicon solar cells, in particular to a mask structure of copper electroplating grid lines for HAC cells and a preparation method thereof. Background technique [0002] At present, there are two main technical routes for metal grid lines of amorphous silicon / crystalline silicon heterojunction solar cells (hereinafter referred to as HAC). Using low-temperature silver paste as raw material, the preparation technology route is simple, easy to master, less process, low process cost, but consumes a lot of silver paste; the second is to use photolithography combined with electroplating technology to prepare copper grid lines, this technology uses copper and chemical solution As the main raw material, photoresist is required in the photolithography process, and there are many processes such as mask preparation, exposure, and glue removal. ...

Claims

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Application Information

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IPC IPC(8): H01L31/20H01L21/288H01L31/0216H01L31/0224C25D5/02
CPCC25D5/022H01L21/288H01L21/2885H01L31/02168H01L31/022425H01L31/202Y02P70/50
Inventor 黄海宾孙喜莲魏秀琴刘翠翠周浪
Owner 江西昌大高新能源材料技术有限公司
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