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Wiring board and production method thereof, and semiconductor apparatus

a technology of wiring board and production method, applied in the direction of plasma technique, printed circuit aspects, metal adhesion improvement of insulation substrates, etc., can solve the problem of requiring tens of microns of an uneven spot to ensure sufficient adhesion, and difficult to create fine wiring with a line width not exceeding tens of microns, etc. problem, to achieve the effect of easy mounting multiples

Inactive Publication Date: 2005-12-08
SAITO TOSHIRO +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention relates to a wiring board with fine wiring and excellent adhesion. The wiring layer is formed on an insulating resin substrate through a degenerated layer and a metallic oxide layer. The average roughness of the substrate surface is equal to or smaller than 1.0 μm. The wiring board is produced by sequential lamination of a catalyst layer, electroless plated film, electroplated film, and copper layer. The invention also includes a method for improving adhesion between the resin substrate and copper by plasma treatment of the substrate and the use of a metallic layer with a reduction potential more base than copper. The wiring board has excellent adhesion and can be used for various applications.

Problems solved by technology

When copper-made wiring is formed on the organic insulating resin substrate, the biggest problem is how to get a close adhesion between the copper wiring and resin substrate.
This method, however, requires tens of microns of an uneven spot to ensure sufficient adhesion.
It has been difficult to create fine wiring having a line width not exceeding tens of microns.
This makes it difficult to produce a fine line / space pattern.
This method is suited for the substrate with its surface having tens of microns of an uneven spot, such as the copper-plated laminate with copper etched out, but cannot be used for a more smooth substrate since effective adhesion cannot be ensured.
When ground metal and copper coexist, however, it is very difficult to etch only the ground metal.
This will raise a problem that, when the wiring board is laminated with insulating adhesive resin, this clearance is not sufficiently filled with adhesive resin, and remains as void.
Furthermore, even when ground metal other than copper is used, there is no etching process.
However, one of the big problems with the full additive method is that it is difficult to provide electroless plating to the resin substrate with excellent adhesion.
In creating a fine line pattern not exceeding 40 μm, it has been difficult to use the substrate having an uneven spot not less than microns.
However, this Official Gazette failed to provide a thick layer of one micron or more by electroless plating.

Method used

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  • Wiring board and production method thereof, and semiconductor apparatus
  • Wiring board and production method thereof, and semiconductor apparatus
  • Wiring board and production method thereof, and semiconductor apparatus

Examples

Experimental program
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Effect test

embodiment 1

[0071] Polyimide film resin substrate, Kapton 200H by Dupont having a surface roughness of 0.1 am or less was used. A 10 cm×10 cm sample was created, and was treated in aqueous solution for surface modification at a liquid temperature of 25° C. for 2 minutes.

[Composition of aqueous solution for surface modification]Sodium hydroxide100 g / lEthylene diamine 70 g / lEthanol100 g / l

[0072] A treated sample was bonded on the epoxy resin substrate with glass cloth, and was vacuum dried at 25° C. for 3 hours. Then the sample surface was pressed against the germanium prism to measure total reflection infrared absorption. Then absorption peak specific to amide group was observed in the vicinity of 1650 cm−1 and 1550 cm−1, in addition to absorption peak in the vicinity of 1780 cm−1 and 1720 cm−1 which were attributable to the carbonyl group of the imide ring. This shows that amide group is introduced on the surface by this surface treatment. This sample was subjected to plating catalyst treatmen...

embodiment 2

[0074] Kapton 200H by Dupont was used as Polyimide film. A 10 cm×10 cm sample was created, and was treated in aqueous solution for surface modification (the same one used in the First Embodiment) at a liquid temperature of 25° C. for 2 minutes. After treatment, the sample was bonded on a glass epoxy resin substrate, and was subjected to plating catalyst treatment according to the specified method using the circuit breakers 3040, 3340 and 4041 by Japan Mining. Then electroless nickel plating solution (B-1 by Okuno Seiyaku) was used to deposit nickel to a film thickness of about 0.1 μm. After plating, the sample was separated from glass epoxy resin substrate, and was left to stand in the flow of oxygen for one hour after having been vacuum dried for three hours while kept heated to a temperature of 40° C. X-ray was irradiated from the polyimide film side at a low angle to measure diffraction spectrum and to check the interface between the polyimide film and nickel film, thereby verify...

embodiment 3

[0075] Kapton 200H by Dupont was used as Polyimide film. Four 5 cm×5 cm samples were created, and was treated in aqueous solution for surface modification (the same one used in the First Embodiment) at a liquid temperature of 25° C. for 2 minutes.

[0076] After treatment, the sample was bonded on a glass epoxy resin substrate, and was vacuum dried 25° C. for three hours. Then cobalt, tin, copper and nickel were deposited on the sample by sputtering to a thickness of about 1 μm. After that, the sample was separated from glass epoxy resin substrate, and was left to stand in the flow of oxygen for one hour. X-ray was irradiated from the polyimide film side at a low angle to measure diffraction spectrum and to check the interface between the polyimide film and metallic film, thereby verifying presence of oxides at the interface for any metal samples. Copper was then deposited on each sputtered metal film by copper electroplating to a film thickness of about 20 μm under the same condition...

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Abstract

Provided is a wiring board and production method thereof, wherein production of wiring by a full additive method is achieved. This is extremely useful in forming fine copper wiring featuring a high adhesion on an insulating resin substrate. A resin having an excellent alkali resistance is used as the insulating resin substrate, and the copper wiring is formed on the insulating resin substrate through a degenerated layer containing amide group and a metallic oxide layer of a metal having a reduction potential more base than that of copper. The degenerated layer can be provided by, e.g., introduction of amide group into the surface of the insulating resin substrate. The copper can be formed by processes including electroless plating. The insulating resin substrate has superb heat resistance and dimensional stability, and the formed structure can provide a highly packed wiring board.

Description

BACKGROUND OF THE INVENTION [0001] The present invention relates to a wiring board and production method thereof, and semiconductor apparatus made up thereof. [0002] Increasing speed and density in LSI technology in recent years have come to require a finer size of electronic circuit wires, a multi-layered structure and further improvement of electric characteristics. To meet these requirements, studies have been made to manufacture multi-layered wiring boards made up of organic insulating materials featuring excellent flatness, heat resistance, dimensional stability and dielectric characteristics. [0003] When copper-made wiring is formed on the organic insulating resin substrate, the biggest problem is how to get a close adhesion between the copper wiring and resin substrate. Conventionally, it was the common practice to improve adhesion with the metallic film deposited on the resin substrate surface through anchoring effect or mechanical entanglement by roughening the resin substr...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H05K3/18H01L21/48H05H1/00H05K1/03H05K3/38H05K3/46
CPCH01L21/4846H05K3/381H05K3/389H05K3/4623H05K3/4661H05K2201/0344H05K2203/0315H05K2203/0793H05K2203/095Y10T29/49126H01L2224/16225H01L2924/00014H01L2224/0401
Inventor SAITO, TOSHIROAKAHOSHI, HARUOITABASHI, TAKEYUKI
Owner SAITO TOSHIRO
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