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Capacitor structure of mixed nano-crystal memory and preparation method thereof

A nanocrystal and memory technology, which is applied to the capacitor structure and preparation of flash memory, and the field of hybrid nanocrystal storage capacitor structure and preparation, can solve the problems of high resistivity, low work function, affecting device performance, etc., and improve storage density. , uniform distribution, the effect of inhibiting chemical reactions

Inactive Publication Date: 2010-04-07
FUDAN UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

In addition, the selection of electrodes in the preparation of capacitor storage will also greatly affect the performance of the device. Traditional polysilicon electrode materials have many problems such as high resistivity and low work function, which have great limitations in the application of nanocrystalline storage capacitors. The metal palladium electrode has a large work function (5.22eV), which can form a barrier height that is conducive to charge erasure with the capacitor medium, and palladium has good chemical stability and thermal stability, so it is used in nanocrystalline storage capacitors. It has great application prospects in the preparation of

Method used

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  • Capacitor structure of mixed nano-crystal memory and preparation method thereof
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  • Capacitor structure of mixed nano-crystal memory and preparation method thereof

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Embodiment 1

[0035] The following is an example of preparing ruthenium and ruthenium oxide mixed nanocrystal storage capacitors by adopting the storage capacitor structure and preparation method provided by the present invention.

[0036] A P-type single crystal silicon chip with (100) crystal orientation is used as a substrate, and the resistivity of the silicon chip is 8-12 ohm·cm. After the silicon wafer has undergone standard cleaning, it is placed in an atomic layer deposition system, and then the surface of the silicon wafer is modified with trimethylaluminum gas for 60 minutes at a temperature of 300°C. Al was then grown by atomic layer deposition 2 o 3 Nano film as tunneling layer, Al 2 o 3 The thickness is 9 nm. Next, magnetron sputtering a ruthenium metal film with a thickness of 2 nanometers on the tunneling layer, and then rapid thermal annealing at 800° C. for 30 seconds in a mixed atmosphere of nitrogen and trace oxygen to form mixed nanocrystals of ruthenium and rutheniu...

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Abstract

The invention belongs to the technical field of manufacturing semiconductor integrated circuits, and particularly relates to a capacitor of a nano-crystal memory and a preparation method thereof. The capacitor uses P-type monocrystalline silicon as a substrate, and an Al2O3 tunneling layer, a ruthenium and ruthenium oxide mixed nano-crystal, an Al2O3 blocking layer and a palladium electrode layer are arranged on the substrate in turn, wherein the Al2O3 layer is prepared by adopting an atomic layer deposition method; the mixed nano-crystal is formed by depositing a ruthenium layer through magnetron sputtering first and then performing rapid thermal annealing in a mixed gas atmosphere of nitrogen gas and a trace amount of oxygen gas; and the palladium electrode layer is formed by adopting a lift-off method. The capacitor structure of the memory has the excellent characteristics of good programming and erasing properties, long charge retention time and the like, and has a good application prospect on a flash memory.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuit manufacturing, and in particular relates to a capacitor structure and a preparation method of a flash memory, in particular to a hybrid nanocrystal storage capacitor structure and a preparation method. Background technique [0002] With the continuous development of semiconductor process technology, the integration density of non-volatile flash memory is getting higher and higher, and the size of memory cells is reduced accordingly. After the 65nm technology node, the traditional polysilicon floating gate structure has a series of problems, which greatly It affects the performance of device storage, such as slow erasing and writing speed, high working voltage, etc. [1]. A new generation of non-volatile memory based on a discontinuous charge trapping mechanism (such as nanocrystalline memory, etc.) has recently attracted widespread attention. Compared with traditional polys...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/92H01L21/02H01L21/3205H01L21/321H01L21/316
Inventor 丁士进苟鸿雁
Owner FUDAN UNIV
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