Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device

a technology of thin film semiconductor and fabrication method, which is applied in the direction of non-linear optics, instruments, mechanical devices, etc., can solve the problems of increasing display size and cost, slow operation speed, and electrical characteristics far inferior to those of polysilicon layers

Inactive Publication Date: 2001-08-16
INTELLECTUAL KEYSTONE TECH LLC
View PDF0 Cites 46 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0084] As discussed in the foregoing, using this invention, high-quality semiconductor films comprised of polycrystalline silicon films and others can be easily formed at low temperatures of less than about 450.degree. C. and 430.degree. C. or lower. Thus, this invention greatly improves the properties of thin film semiconductor devices as well as brings about reliable mass production. To be specific, it has the effects that are described below.
[0085] Effect 1). Since the processing temperatures are below about 450.degree. C., low-cost glass can be used and it is possible to lower the price of the products. Additionally, since it is possible to prevent the warpage of the glass under its own weight, it is easily possible to increase the size of liquid crystal displays (LCDs).
[0086] Effect 2). Since the processing temperatures are approximately 350.degree. C. or less, there is no thermal degradation of the underlevel insulator layer or gate insulator layer; and it is possible to easily produce high-performance thin film semiconductor devices with excellent reliability.
[0087] Effect 3). Laser irradiation can be applied uniformly over the entire substrate. The result of this is that the uniformity of each lot is improved, and reliable production has become possible.
[0088] Effect 4). The formation of self-aligned TFTs in which the gate electrode is aligned with the source and drain by ion doping and subsequent low temperature activation at approximately 300.degree. C.-350.degree. C. has become remarkably easy. As a result, it has become possible to reliably activate impurity ions. Additionally, it has become possible to easily and reliably fabricate lightly doped drain (LDD) TFTs. Because LDD TFTs have been realized by low temperature process poly-Si TFTs, it has become possible to decrease TFT element size and off leak currents.
[0089] Effect 5). In the prior art, only low temperature poly-Si TFTs having SiO.sub.2 made by ECR-PECVD showed good transistor characteristics. Using this invention, however, this has become possible using conventional PECVD reactors. Consequently, practical gate insulator layer fabrication equipment applicable to large substrates and suitable for mass production has been achieved.
[0090] Effect 6). Thin film semiconductor devices with higher on currents and lower off currents than those produced by the prior art have been obtained. Additionally, the non-uniformity in these values has been decreased.
[0091] Effect 7). When using low price, conventional glass, it has become possible to form underlevel protection layers which effectively prevent the incorporation of impurities from the substrate into the semiconductor film and simultaneously act as the underlevel protection layer for thin film semiconductor devices showing optimum electrical properties. Also, the degradation of the electrical properties of thin film semiconductor devices as a result of stress from the underlevel protection layer and the generation of cracks in the thin film semiconductor devices have been avoided.
[0092] Effect 8). The incorporation of constitutive elements such as fluorine (F) and carbon (C) from cleaning vapors into the semiconductor films when such films are formed by plasma enhanced chemical vapor deposition (PECVD) has been prevented. As a result, the amount of impurities among substrates can always be kept to a minimum and it has become possible to reliably fabricate excellent thin film semiconductor devices.
[0093] Effect 9). Even when depositing semiconductor films by low pressure chemical vapor deposition (LPCVD) at low temperatures less than about 450.degree. C., it has become possible to simultaneously achieve uniformity, both within a single substrate and among different substrates, and a suitable deposition rate. Therefore, it is possible to accommodate increasing substrate size; and it has become possible to mass produce large-area LCDs.
[0094] Effect 10). Three types of variation in electrical properties of thin film semiconductor devices are recognized: variation within a single substrate, variation among substrates within the same lot, and variation from lot to lot. Using this invention, however, all three types of variation can be controlled. The variation among lots processed by PECVD has been particularly significantly improved.
[0095] Effect 11). Even when the semiconductor film is grown by PECVD, good adhesion between the semiconductor film and the underlevel protection layer can be achieved. In other words, problems such as the generation of numerous crater-shaped holes in the semiconductor film and peeling of the films have been avoided.
[0096] Effect 12). Even without special crystallization processing, poly-Si TFTs can be fabricated reliably on large-area substrates by low temperature processing less than or equal to about 350.degree. C.

Problems solved by technology

Such amorphous silicon layers, however, have such problems as electrical characteristics far inferior to those of polysilicon layers and slow operating speed.
Since the high temperature process polysilicon TFTs use quartz substrates, however, there are problems with increasing display size and decreasing costs.
But, when using large substrates which are well-suited to mass production, there is a severe restriction in that the substrates must be kept below a maximum processing temperature of about 570.degree. C. in order to avoid deformation of the substrates.
As described below, however, there are several inherent problems with poly-Si TFTs fabricated by the existing technology in the low temperature process which act as impediments to the adoption of this technology into mass production.
1. The high processing temperature of 550.degree. C. prevents the use of low-priced glass leading to a steep rise in product prices.
Additionally, the degree of warp of the glass substrates as a result of their own weight increases as substrate size increases, and increases in liquid crystal display (LCD) sizes are not possible.
As a result, the crystallization of the film can vary from uniform to non-uniform from lot to lot and reliable production is not possible.
3. During the ion doping or subsequent low temperature activation at 300-350.degree. C. of the source and drain regions which are self-aligned with respect to the gate electrode, the problem of unsuccessful activation occasionally occurs.
Especially when producing TFTs with lightly doped drains (LDD), this problem is serious and is a cause of significant decreases in production yield.
4. Although only SiO.sub.2 formed by ECR-PECVD yields suitable transistor properties in low temperature process poly-Si TFTs, it is difficult to increase the size of the ECR source in the ECR-PECVD equipment thereby making ECR-PECVD unsuitable for large LCD panels.
Furthermore, the throughput is extremely poor.
Consequently, ECR-PECVD reactors are not suitable as mass production-compatible, practical gate oxide film deposition equipment applicable to the manufacture of large size displays.
5. Use of means such as laser irradiation for melt crystallization of semiconductor films like silicon results in partial agglomeration which can lead to large variations in the electrical properties of the semiconductor layer, roughness of the semiconductor layer, and decreases in the gate-source or gate-drain electrical breakdown strength.
In other words, making the underlevel protection layer thicker to prevent impurity penetration leads to the deterioration of the electrical properties of the semiconductor device from stress generated by the underlayer or generates cracks in the semiconductor device.
The result is that the amount of impurities incorporated into the substrates varies, and it is not possible to reliably produce excellent thin film semiconductor devices.
8. As the deposition temperature for semiconductor films in low pressure chemical vapor deposition (LPVCD) decreases, compatibility between uniformity within a substrate and the deposition rate is difficult.
In other words, because the deposition rate decreases when the deposition temperature is lowered, the increase in pressure necessary to compensate for this behavior results in significant worsening of the uniformity over a single substrate.
This tendency becomes noticeably more pronounced as the substrate size becomes larger and is a major obstacle to the mass production of large LCDs.
In the thin film semiconductor devices and the fabrication procedures of the existing technology, it is not possible to control these three types of non-uniformity.
In the fabrication of semiconductor thin films by PECVD, the adhesion between the semiconductor layer and the protective underlayer is poor; and numerous crater-shaped holes are generated in the semiconductor layer which can lead to delamination of the film in the worst case.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device
  • Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device
  • Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0103] FIGS. 1(a) through (d) show cross-sectional views of the fabrication process for a thin film MIS field effect transistor.

[0104] In Example 1, a 235 mm.times.235 mm sheet of non-alkaline glass (OA-2, manufactured by Nippon Electric Glass Co., Ltd.) was used for substrate 101, though the type and size of the substrate are irrelevant for any substrate able to withstand the maximum processing temperature. First, silicon dioxide film (SiO.sub.2 film) 102, which serves as the underlevel protection layer, is formed on substrate 101 by means of atmospheric pressure chemical vapor deposition (APCVD), PECVD, sputtering or other means. In APCVD, the SiO.sub.2 layer can be deposited using monosilane (SiH.sub.4) and oxygen as source gases at a substrate temperature of between about 250.degree. C. and 450.degree. C. In the PECVD and sputtering methods, the substrate temperature can be anywhere from room temperature to 400.degree. C. In Example 1, a 2000 .ANG. SiO.sub.2 film was deposited a...

example 2

[0112] Other examples of implementations of this invention will also be explained using FIGS. 1(a) through (d).

[0113] In Example 2, sheets of non-alkaline glass (OA-2manufactured by Nippon Electric Glass Co., Ltd.) measuring 300 mm.times.300 mm and crystallized glass (TRC-5 manufactured by Ohara) measuring 300 mm.times.300 mm were used for substrate 101. The strain point of OA-2 is approximately 650.degree. C. TRC-5, on the other hand, is a crystallized glass, so the strain point cannot be defined. Since absolutely no substrate deformation or warpage can be detected up to a temperature of about 700.degree. C., however, the strain point of TRC-5 can, in practice, be said to be above about 700.degree. C. First, silicon oxide film 102, which becomes the underlevel protection layer, was deposited by PECVD onto substrate 101. The silicon oxide film was deposited under the same conditions that the gate insulator layer was deposited in Example 1. The thickness of the silicon oxide film was...

example 3

[0117] After forming the poly-Si-layer using the method described in detail in Example 1, an SiO.sub.2 layer corresponding to the gate insulator layer described in detail in Example 1 was deposited without patterning this poly-Si layer, and impurity ions such as PH.sub.3 were implanted in the poly-Si layer by ion doping, details of which were explained in Example 1. The thicknesses of the poly-Si layer and Sio.sub.2 layer and the conditions under which they were deposited were exactly the same as they were in Example 1. Impurity ion implantation conditions were also the same as those described in Example 1 except that the implantation dose was 3.times.10.sup.13 cm.sup.-2. Example 3 corresponds to the formation of the LDD region in TFTs explained in Example 1. After phosphorous ions were implanted, thermal annealing was performed at 300.degree. C. in oxygen for one hour, again just as in Example 1. After that the insulator layer was stripped off and the sheet resistance of the n-type...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
surface roughnessaaaaaaaaaa
surface roughnessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to view more

Abstract

In order to fabricate a high performance thin film semiconductor device using a low temperature process in which it is possible to use low price glass substrates, a thin film semiconductor device has been fabricated by forming a silicon film at less than 450° C., and, after crystallization, keeping the maximum processing temperature at or below 350° C. In applying the present invention to the fabrication of an active matrix liquid crystal display, it is possible to both easily and reliably fabricate a large, high-quality liquid crystal display. Additionally, in applying the present invention to the fabrication of other electronic circuits as well, it is possible to both easily and reliably fabricate high-quality electronic circuits.

Description

FIELD OF TECHNOLOGY[0001] The present invention is related to the fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal displays, and electronic devices applicable to active matrix liquid crystal displays and the like.BACKGROUND TECHNOLOGY[0002] In recent years, along with increases in screen size and improvements in resolution, the driving-methods for liquid crystal displays (LCDs) are moving from simple matrix methods to active matrix methods; and the displays are becoming capable of displaying large amounts of information. LCDs with more than several hundreds of thousands pixels are possible with active matrix methods which place a switching transistor at each pixel. Transparent insulating substrates such as fused quartz and glass which allow the fabrication of transparent displays are used as substrates for all types of LCDs. Although ordinarily semiconductor layers such as amorphous silicon or polycrystalline silicon ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(United States)
IPC IPC(8): F16C29/00G02F1/136G02F1/1362H01L21/20H01L21/205H01L21/28H01L21/324H01L21/336H01L29/49H01L29/786
CPCF16C29/00G02F1/13454G02F2202/104H01L21/28079H01L21/3105H01L29/4908H01L29/66757H01L29/78675H01L21/0237H01L21/02521H01L21/02532H01L21/02576H01L21/02579H01L21/0262H01L21/02661F16C2360/45H01L29/768
Inventor MIYASAKA, MITSUTOSHI
Owner INTELLECTUAL KEYSTONE TECH LLC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products