In a gate
driving circuit and a display apparatus, the gate
driving circuit comprises a plurality of stages. At least one of the stages comprises a pull-up section responsive to a first node
signal; a pull-down section responsive to a second input
signal; a discharging section discharging the first node
signal in response to the second input signal; a first holding section responsive to the first
clock signal, maintaining the first node signal at the off-
voltage; and a second holding section responsive to the second
clock signal, maintaining the first node signal at the off-
voltage. The second holding section has a greater
transistor width-to-length ratio than the first holding section. Therefore, an abnormal gate-on signal is less likely to occur, reducing driving defects of the display apparatus.