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47 results about "PWE3" patented technology

In 2001, the IETF set up the pseudowire emulation edge to edge working group, and this group was given the acronym PWE3 (the 3 standing for the third power of E, i.e. EEE). The working group was chartered to develop an architecture for service provider edge-to-edge PWs, and service-specific documents detailing the encapsulation techniques.

Method and system for negotiating bidirectional forwarding detection session identifier for pseudo wire

The invention discloses a method for a specificator of a bidirection forwarding detection session in a negotiation pseudo wire, a device and a system thereof. The invention is used for solving the problem existing in a PWE3 system which causes the processing process difficult through using the specificator of a bidirection forwarding detection session in an LSP Ping negotiation pseudo wire. The method in the invention comprises the processes: a first device sends the information used for the pseudo wire parameter negotiation to a second device, and the information carries a bidirection forwarding detection BFD ability of a VCCV and a BFD specificator determined by the virtual circuit of the pseudo wire in the first device; when the second receives the BFD ability and the BFD specificator, the information which carries the BFD ability of a VCCV of the pseudo wire in the second device and the distributed BFD specificator of the pseudo wire is sent to the first device by the second device; by adopting the method in the invention, the negotiation process of the bidirection forwarding detection session is simplified, thus increasing the building and maintenance efficiency of the pseudo wire in the system.
Owner:HUAWEI TECH CO LTD

PWE3 device and method for reading and writing data in jitter buffer of device

The invention discloses a PWE3 (Pseudo-Wire Emulation Edge to Edge) device and a method for reading and writing data in a jitter buffer of the device. The method comprises the steps as follows: setting cycles at intervals, counting residual data amount in the jitter buffer, and obtaining a statistics PDV (path delay value) according to the residual data amount and a TDM (time division multiplexing) business data rate V; ensuring the difference value between the statistics PDV and the current PDV, decreasing the current PDV according to a set step width if the absolute value of the difference value is larger than a set threshold value and the difference value is negative, and increasing the current PDV according to the set step width if the absolute value of the difference value is larger than the set threshold value and the difference value is positive; and determining data amount PDVt according to the TDM business data rate V and the current PDV, and starting to read data from the jitter buffer after data is started to be written in the jitter buffer and until the data amount reaches PDVt. According to the embodiment of the invention, the PDV used for reading and writing jitter buffer data is adjusted dynamically according to a specific step width, so that the balance between delay and packet loss can be realized effectively.
Owner:RAISECOM TECH
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