An embodiment of the present invention provides a variable node
processing unit (31) for a non-binary error
correction code decoder, the variable node
processing unit (31) being configured to: receive a check node message and an inherent reliability metric, and generate a variable node message based on auxiliary components derived from the check node message and the inherent reliability metric, the inherent reliability metric being derived from a received
signal, the auxiliary components comprising auxiliary symbols and auxiliary reliability
metrics associated with the auxiliary symbols, wherein the variable node
processing unit (31) comprises: a sorting and redundancy
elimination unit (313), which is configured to iteratively process the auxiliary components and determine the components of the variable node message by the following operations: iteratively sorting the auxiliary components according to a given order of the auxiliary reliability
metrics, and retaining a predefined number of auxiliary components including the most reliable and all mutually different auxiliary symbols.