Patents
Literature
Hiro is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Hiro

30results about How to "Erase block" patented technology

Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells

ActiveUS20060221660A1Avoid over-erasing faster erasing storage elementEfficiently and accurately eraseRead-only memoriesDigital storageTheoretical computer scienceVolatile memory
A set of non-volatile storage elements is divided into subsets for erasing in order to avoid over-erasing faster erasing storage elements. The entire set of elements is erased until a first subset of the set of elements is verified as erased. The first subset can include the faster erasing cells. Verifying the first subset includes excluding a second subset from verification. After the first subset is verified as erased, they are inhibited from erasing while the second subset is further erased. The set of elements is verified as erased when the second subset is verified as erased. Verifying that the set of elements is erased can include excluding the first subset from verification or verifying both the first and second subsets together. Different step sizes are used, depending on which subset is being erased and verified in order to more efficiently and accurately erase the set of elements.
Owner:SANDISK TECH LLC

Nonvolatile semiconductor memory device and method of operating the same which stably perform erase operation

InactiveUS20070279999A1Appropriately and accurately controlErasing of the memory cells on the unselected word lines can be avoidedRead-only memoriesDigital storageComputer scienceNon-volatile memory
A nonvolatile semiconductor memory device includes a memory array and an X-decode section. The memory array includes a plurality of nonvolatile memory cells arranged in a matrix form and a plurality of word lines. The X-decode section selects a selected word line selected from the plurality of word lines, supplies a negative voltage to the selected word line, and supplies a positive voltage to unselected word lines which are not the selected word line, at the time of an erase operation.
Owner:RENESAS ELECTRONICS CORP

Semiconductor device

A semiconductor device includes a semiconductor substrate, an electrode pad electrically connected to a circuit element formed on the semiconductor substrate, a connection wiring electrically connected to the electrode pad and extending on the semiconductor substrate, and a post electrode formed on the connection wiring. The semiconductor device further includes an adhesion film formed on the side surface of the post electrode, and a sealing layer that has light-shielding property and seals the surface of the adhesion film and the connection wiring.
Owner:LAPIS SEMICON CO LTD

Method for executing power on self test on a computer system and updating SMBIOS information partially

A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.
Owner:INVENTEC CORP

Flash memory device storing data with multi-bit and single-bit forms and programming method thereof

A flash memory device may include a memory cell array including a plurality of memory blocks and a partition information block, the partition information block storing partition information that indicates a boundary between multi-bit memory blocks and single-bit memory blocks among the memory blocks. The memory device may include a control logic configured to determining whether a memory block that a block address from the outside indicates has a multi-bit form or a single-bit form based on the partition information and to control program and read operations in a multi-bit form or a single-bit form based on a determination result. The control logic automatically programs data in the partition information block according to whether a fuse connected to the control logic fuse is cut or not, the data being used for preventing the partition information block from being programmed or erased.
Owner:SAMSUNG ELECTRONICS CO LTD

Network system and communication method

A network system and a communication method are provided to solve an NAT problem to functionalize a P2P application in case that new port information (number) is assigned to an NAT device. One communication device sends a pseudo-packet containing an address of another communication device, to a port information transmitting device via an address translation device; the port information transmitting device sends a response to the received pseudo-packet to the communication device; and the address translation device assigns new port information corresponding to the communication device address using the response and sends the address of the communication device and the assigned port information to the communication device. The communication device sends the received address of the communication device and the assigned port information to another communication device; and another communication device transmits information with the communication device using the received address of the communication device and the assigned port information.
Owner:FUJITSU LTD

Multi-party communication system, terminal device, multi-party communication method, program and recording medium

The present invention provides a multi-party communication system in which the speaking party can be identified aurally and the speech contents can be accurately transmitted to the party at the receiving terminal. A multi-party communication server and a plurality of terminal devices with a communication function make up the multi-party communication system. Each terminal device with the communication function includes a speech right management unit, a speaking party name output unit and a buffer unit. The speaking party name output unit outputs the voice data of the speaking party identification information such as the name of the speaking party. The buffer unit accumulates the speech voice of the user as voice data. The speech right management unit controls the buffer unit to produce an output after the speaking party output unit. The speech right management unit issues a request to cancel the right to speak after completion of the output of the speech voice data.
Owner:NEC CORP

Digital camera and method of preventing image data from being erased from the digital camera

The present invention relates to a digital camera, which is designed such that a recording medium can be loaded thereon, the medium capable of recording photographed image data and prohibiting recorded image data from being erased. The digital camera includes an initialization instruction unit for instructing the loaded recording medium to initialize, and a notification unit for performing a predetermined notification operation for notifying execution of initialization. In the digital camera, the notification unit performs the predetermined notification operation when image data which is prohibited from being erased is recorded on the recording medium when the recording medium is instructed to initialize by the initialization instruction unit. When the recording medium on which the image data which is prohibited from being erased is recorded is loaded, and when the recording medium is instructed to initialize, the digital camera can prevent the image data from being inadvertently erased.
Owner:FUJIFILM HLDG CORP +1

Digital camera and method of preventing image data from being erased from the digital camera

The present invention relates to a digital camera, which is designed such that a recording medium can be loaded thereon, the medium capable of recording photographed image data and prohibiting recorded image data from being erased. The digital camera includes an initialization instruction unit for instructing the loaded recording medium to initialize, and a notification unit for performing a predetermined notification operation for notifying execution of initialization. In the digital camera, the notification unit performs the predetermined notification operation when image data which is prohibited from being erased is recorded on the recording medium when the recording medium is instructed to initialize by the initialization instruction unit. When the recording medium on which the image data which is prohibited from being erased is recorded is loaded, and when the recording medium is instructed to initialize, the digital camera can prevent the image data from being inadvertently erased.
Owner:FUJIFILM CORP

NAND Flash Memory Device And Related Method Thereof

The NAND flash memory device contains a NAND flash memory, a mirror data area, and a controller. The mirror data area has a size at least to hold a page of data and is usually formed by random access memory. The controller saves a data to be written into the NAND flash memory that occupies a partial number of the sectors of a first page of the NAND flash memory into the sectors of a second page of the mirror data area. When a new data is to be written into the remaining sectors of the first page of the NAND flash memory, the new data is stored instead into the second page's remaining sectors of the mirror data area. When the second page of the mirror data area is full, the entire second page is written into the first page of the NAND flash memory.
Owner:MOAI ELECTRONICS

Magnetic film for magnetic head

The magnetic film includes an FeCo layer, restrains erasing data by a magnetic field leaked from a magnetic pole, has high saturation magnetic flux density and soft magnetism and writes data with high recording density. The magnetic film for a magnetic head of the present invention comprises: a nonmagnetic layer including at least one selected from a group of Ru, Rh, Ir, Cr, Cu. Au, Ag, Pt and Pd; a magnetic layer including Fe and Co. Anisotropy magnetic field is 0.8 kA / m or more.
Owner:FUJITSU LTD

Optical disc drive

When a multilayered optical disc is used, the signal-to-noise ratio of a read signal is decreased as effective reflectance is extremely low due to the influence of reflection and absorption by front recording layers. Further, when a high-frequency modulation technology is used to suppress returned light noise of a laser, the erasure of recorded information is likely to occur on certain types of discs, making it difficult to simultaneously achieve the suppression of returned light noise of a laser and the prevention of the erasure of recorded information. To address the above problems, the present invention includes a section that performs a read by executing a multi-tone demodulation. The present invention also includes a section that controls the position and shape of a read light pulse to be radiated on a recording layer.
Owner:HITACHI CONSUMER ELECTRONICS CORP +1

Mask for manufacturing a highly-integrated circuit device

A set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.
Owner:SAMSUNG ELECTRONICS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products