24 results about "Bare machine" patented technology

The invention provides a linear compensation method and system for a periodic synchronization position mode based on a bare computer system and a medium, and the method comprises the steps: reading a target position A when PDI data interruption is triggered, and storing the target position A in a first region of a second-level cache array; when the SYNC0 is synchronously interrupted, reading the target position B, comparing the target position B with the data in the first area of the second-level cache array, and judging whether the processing of the PDI data interruption in the current period and the data of the target position meet set conditions or not; on the basis of a judgment result, matching corresponding PDI data interruption and SYNC0 signal time sequence interruption scenes, and selectively executing linear compensation operation or directly adopting target position data; target position data or a linear compensation value X is analyzed and assigned to a motor for driving, and continuous output of a target position in a periodic synchronous position mode is achieved; in a cache and pointer mode, PDI data processing is interrupted, target position information is updated, and the continuity of a target position in a periodic synchronization mode is ensured.

The application discloses a kind of about bare machine server BIOS automation deployment method, it is related to automation programming technical field, bare machine server carries out BMC management port initialization configuration, opens BMC setting Https (web), SSH, Redfish and IPMI service agreement, by bare machine server SSH, Redfish and different equipment special tool, from bare machine server BMC management port call relevant protocol, by system automatic judgment uses what protocol or tool is directed to different manufacturer's bare machine server and carries out BIOS data acquisition.The application is by system automatic judgment uses what protocol or tool is directed to different manufacturer's bare machine server and carries out BIOS data acquisition, multiple data acquisition protocols are used simultaneously, by system automatic determination uses data acquisition method, ensure that the most complete BIOS configuration item parameter is obtained, reduce manual participation manual data acquisition, by using BIOS template packing and encapsulating automation deployment method, unified generation standardization BIOS template, by system automatic deployment, without manual participation, speed up deployment time.

The application provides a multi-storage medium and multi-system online upgrading method based on ZYNQ embedded system, the method divides a nonvolatile memory into a Golden program area and an upgraded program area; after power-on of the device, the Golden program is loaded to a DDR high address for running, thereby effectively avoiding memory address conflict during FPGA bit stream loading; the Golden program requests upgrading through a network port, if there is no upgrading instruction, Header information of the upgraded area is analyzed, a bare machine APP, UBOOT or FPGA bit stream is dynamically guided; if there is an upgrading instruction, a new program is received and written into the upgraded area and is verified.The application has the beneficial effects that the upgrading brick risk and address conflict problem are solved, and safe and flexible upgrading of the multi-system is realized.

The invention relates to a page mapping self-adaptive generation method and system in a bare computer environment, and belongs to the field of memory management, the method comprises the following steps: establishing minimum necessary page table mapping in a system initialization process, setting a virtual address area where a core program is located as an effective mapping area, and setting other virtual address areas as invalid mapping areas; when the virtual address accessed by the processor executing the program instruction is an invalid mapping area, the MMU generates a data access synchronization exception, and obtains an exceptional virtual address and an access width of the data access synchronization exception; when the access synchronization exception is a missing page exception; performing granularity decision according to the abnormal virtual address and the access width, and generating a decision result; and creating or updating corresponding page table entries according to a decision result, and refreshing the TLB. According to the method, the problems of high starting overhead, low memory utilization rate and insufficient access security of a traditional scheme are solved, and the method is suitable for embedded bare computer systems such as ARMv8-A and the like.

The present application relates to a Linux kernel low-speed io efficiency improving method, comprising the following steps: installing a jailhouse tool; performing cell configuration; initializing a Linux application; running an iodemo.bin bare machine; and performing data transceiving.The Linux kernel low-speed io efficiency improving method provided by the present application can run an i2c program (iodemo.bin) independently through the jailhouse tool, and can interact with the Linux through the shared memory mode, greatly reducing the io intensity of the Linux, enhancing the cpu intensity, and improving the kernel real-time performance and efficiency.

The application provides a linear compensation method and system for a periodic synchronous position mode based on a bare machine system and a medium. The method comprises the following steps: when a PDI data interrupt is triggered, reading a target position A and storing the target position A in a secondary cache array zone 1; when a SYNC0 synchronous interrupt is triggered, reading a target position B again, comparing the target position B with the data in the secondary cache array zone 1, and judging whether the processing of the PDI data interrupt and the target position data in the current period meet the set conditions; based on the judgment result, matching the time sequence breaking scene of the corresponding PDI data interrupt and the SYNC0 signal, selectively executing a linear compensation operation or directly using the target position data; analyzing the target position data or a linear compensation value X, and assigning the value to a motor drive to realize continuous output of the target position in the periodic synchronous position mode; and through the cache plus pointer mode, updating the target position information in the PDI data processing interrupt to ensure the continuity of the target position in the periodic synchronous mode.

1. Name of the product in this design: Cash register (bare machine). 2. Purpose of this design: For self-service checkout. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: a 3D model.

Embodiments of the invention provide a storage device test method, an electronic device and a storage medium. The method comprises the steps of generating an installation configuration file based on a mirror image of a preset operating system and preset configuration; if the bare computer including the to-be-tested storage device is started and enters a pre-start execution environment, sending the installation configuration file to the bare computer, and controlling the bare computer to install the preset operating system based on the installation configuration file; and if the preset operating system is installed successfully, determining that the to-be-tested storage device passes a first compatibility test. According to the embodiment of the invention, the compatibility of the storage device in the process of installing the operating system can be tested by installing the operating system on the bare storage device, so that the compatibility testing efficiency of the storage device is effectively improved.

The application discloses a chip prototype verification method and device, medium and product, and relates to the technical field of integrated circuit verification, and comprises the following steps: in a chip prototype verification platform, a central processing unit core of a multi-core chip is dynamically divided into a first core group and a second core group; data interaction is performed on the first core group and the second core group through an inter-core communication agent to obtain a verification control instruction; a test case is converted into a chip register operation instruction or a real-time operating system driver calling instruction based on the verification control instruction; the chip register operation instruction is distributed to the first core group to execute a hardware real-time verification process, and the real-time operating system driver calling instruction is distributed to the second core group to execute a multi-task scheduling verification process, so that corresponding register snapshots and task scheduling logs are obtained; the register snapshots and the task scheduling logs are aligned according to a time axis, so that a chip function verification result report is generated based on the aligned data. The application realizes the collaborative verification of bare machine and real-time operating system verification.

The invention discloses a bare-computer testing system and method for a server, and relates to the technical field of bare-computer testing for the server, and the bare-computer testing system comprises a hardware supervision platform, a bare-computer testing module and a visual decision-making module.The bare-computer testing system is provided with the hardware supervision platform, the bare-computer testing module and the visual decision-making module; a perfect bare computer testing system is constructed, the coverage integrity is improved, intelligent decision making is achieved, and the hardware specification compliance is automatically judged through a consistency checking engine; according to the method, report standardization is achieved, a machine-readable JSON / XML format test report is output, the problems of efficiency, accuracy, compatibility and intelligence in the large-scale server test process are solved, real-time monitoring processing can be conveniently conducted on each link, server bare computer test data and corresponding analysis results are managed, visualized and stored, and the test efficiency is improved. The bare computer test management of the server can be realized through cloud management and control of the Internet of Things, and the intelligent level of the bare computer test management of the server is improved.

1. The name of the design product: cloud platform resource display graphical user interface for electronic equipment. 2. The use of the design product: for an electronic device. 3. The design points of the design product: in the graphical user interface. 4. The picture or photo that best indicates the design points: front view. 5. Other faces of the electronic device are commonly designed, and other views are omitted. 6. The use of the graphical user interface: the interface is used to view the allocation of cloud platform resources. The interface shown in the front view is the initial interface. In the interface shown in the front view, click the first "KVM" below "bare machine 182 (table)" in the upper middle position to enter the interface change state diagram.

The invention provides a data management method, a data management system and electronic equipment, which are applied to an electric energy meter configured with a nonvolatile storage medium, and the nonvolatile storage medium is pre-divided into a file system partition and a bare computer storage partition which are logically isolated; the method comprises the following steps: respectively storing to-be-stored ammeter data into a file system partition and a bare computer storage partition; in response to the data reading request, preferentially reading target data from the file system partition; and when reading from the file system partition fails, reading the target data from the bare computer storage partition, and recording a reading failure event. In the mode, a storage structure in which the file system and bare computer storage coexist can be constructed on the nonvolatile storage medium, so that the hardware cost is reduced, and the reliability of data storage is improved.

The application relates to the computer technical field and discloses a control method and device of an LLDP enabling state and a medium, which are applied to an LLDP enabling state monitoring thread created by a BMC and comprise the following steps: when it is determined that an LLDP enabling state modification request is received and it is determined that a network card meets an LLDP enabling state modification condition, a target interface is called to obtain modification request related information; then, a target network port is determined according to the modification request related information; and after a modification data packet is encapsulated, the modification data packet is sent to the network card, so that the network card sets a corresponding LLDP enabling state of the target network port. Therefore, the LLDP enabling state monitoring thread created by the BMC realizes modification of the LLDP enabling state of the network port in an out-of-band mode, the operation system does not need to be installed with an LLDP client for operation, the modification of the LLDP enabling state can be realized in a bare machine state, and the diversity of LLDP function control is increased.

The application discloses a computing power server leasing order agile algorithm under a multi-tenant intelligent computing center. The server is brought into a ready state through pre-deployment. After a tenant places an order, a ready server is matched and locked. Delivery is completed through SDN network configuration and permission injection. The server is automatically recycled and reset at the end of the lease period. The core lies in pre-installation and full-process automation, which solves the problem of long delivery time of traditional bare machines, realizes order placement and delivery, guarantees multi-tenant isolation safety, improves resource utilization and user convenience, and is suitable for the computing power leasing scene of the multi-tenant intelligent computing center.

The application discloses a system architecture, a method and equipment for embedded full-connection real-time communication, and the architecture comprises at least two communication nodes connected with core boards and gigabit full-duplex Ethernet links connected between the nodes; the core boards are provided with embedded multi-core CPUs, and one of the core boards is selected as a main control board; one core of the multi-core CPU of the main control board is selected to deploy an embedded operating system, and the remaining cores directly run bare machine software without deploying the operating system; all the cores of the multi-core CPU of the core board other than the main control board do not deploy the operating system and directly run the bare machine software; and an application program module for processing business logic runs on the core of the bare machine software. Through input variable tables and input variable tables, all real-time data exchanges can be directly exchanged in point-to-point real-time synchronization, various businesses can be processed in parallel and decoupled and independently run, and the businesses do not affect each other, so that the running processing efficiency is improved.

The invention belongs to the field of man-machine interaction, relates to an avionics equipment touch gesture recognition technology, and provides a low-delay touch gesture recognition method and system for an aviation bare computer environment, and the method comprises the steps: responding to an interrupt signal outputted by a touch chip, and reading the touch data of a current frame through polling scheduling DMA operation; performing multi-dimensional cooperative verification on the current frame of touch data to obtain effective touch data; based on the effective touch data, obtaining core features of the current touch event by adopting a touch point track trend feature extraction algorithm; and matching the core feature with a preset gesture rule base, and outputting a gesture recognition result corresponding to the current touch event. The method does not need an operating system, does not depend on a black box model, has the advantages of low delay (less than 10ms), high accuracy, strong interference resistance, complete verifiability and the like, and meets the requirements of aviation airworthiness certification.

The invention discloses a server performance detection method based on deep learning, and relates to the technical field, and the method comprises the steps: collecting multi-dimensional performance data from a server, guaranteeing that an adaptive GPU driver can be deployed in a bare computer Linux environment, and improving the performance of the server; through setting a performance prediction and anomaly detection module, a server privacy security module and a data acquisition and preprocessing module, a performance attenuation prediction model is established based on an LSTM network, a computing power stability report is output, server performance data is converted into a format suitable for deep learning model analysis, and the performance attenuation prediction result is obtained. Original server performance data is converted into a visual image or a feature map, management processing of each module, unit and power equipment is facilitated, the rising trend of a video memory error rate is predicted through an LSTM model, hardware aging is early warned in advance, fault pre-judgment processing is achieved, server performance detection management can be achieved through Internet of Things cloud management and control, and the service life of the server is prolonged. And the intelligent level of server performance detection management is improved.

According to the equipment information bootstrap-based heterogeneous embedded platform bare computer program operation method, hardware equipment information bootstrap is carried out, so that identification of hardware equipment of different manufacturers by a bare computer program is realized; through a bootstrap information verification mechanism, reliability and safety of drive loading are ensured; according to the method for dynamically loading the drive program through the bare computer program according to the bootstrap information of the hardware equipment, the cost problem caused by developing different bare computer programs for a heterogeneous hardware platform is solved, and the product iteration period is greatly shortened. The method is suitable for a bare computer program use scene of an embedded environment with diversified hardware platforms and limited resources, and quick deployment of the bare computer program on a heterogeneous hardware platform is realized.

The invention provides a single-chip microcomputer upgrading method and device, and the method comprises the steps: controlling an external Flash memory to receive a data package sent by a sending device connected with a target single-chip microcomputer when the target single-chip microcomputer is in a bare computer working mode, and determining whether a preset application program is correct or not according to a crc value of the preset application program; if yes, writing the data packet into an external Flash memory; a program updating instruction is received, according to the program updating instruction, the BOOT package is called into an internal RAM of the target single-chip microcomputer from an external Flash memory, and a bootstrap program is run and started; and controlling the starting guide program to write the preset application program into the internal Flash memory of the target single-chip microcomputer from the external Flash memory so as to upgrade the single-chip microcomputer after the target single-chip microcomputer is reset. According to the invention, the external Flash memory detects the data packet, and after the preset application program in the external Flash memory is stored in the internal Flash memory, the correctness of the preset application program in the internal Flash memory is ensured, so that the firmware upgrading of the target single-chip microcomputer is ensured.

The invention discloses an XDMA interface operation control method in an FPGA in a drive-free environment, and the method constructs a control process based on direct address mapping and a bare writing mechanism, and is suitable for scenes lacking drive support, such as RTOS, bare computer system, embedded Bootloader, UEFI and the like. An XDMA control framework based on register bare writing and address mapping completely bypasses a traditional operating system driving module and has platform independence and deployment independence; compared with a traditional scheme which only carries out initialization configuration, the method provided by the invention provides a complete task sending, state monitoring and result reading mechanism, has a continuous interaction capability, and supports real-time data-driven communication in a complex calculation scene; by setting a special status bit and a soft reset register, the sensing and software-level recovery of the XDMA running state are realized, the robustness and stability of the system are enhanced, and the communication reliability is improved; the method can be widely deployed in running environments such as RTOS (Real Time Operating System), bare computers, UEFI (Unified Extensible Firmware Interface), Bootloader, lightweight containers and the like.

The application discloses a method for automatic deployment of a bare machine server operating system, which can support deployment of different types of operating systems, generate a standardized ISO operating system template through unified interface setting, and is automatically deployed by the system without manual participation, so that the deployment time is shortened, the system can automatically analyze and judge the bare machine server before and after deployment, the accuracy of the deployed bare machine server is ensured, misoperation to a running business server is avoided, and the deployed bare machine server can normally enter the operating system.

The invention is suitable for the technical field of computers, and provides a performance evaluation method of a CPU micro-architecture, a bare computer performance evaluation tool, electronic equipment and a computer program product, the method is applied to the bare computer performance evaluation tool, and the method comprises the following steps: based on a performance evaluation demand of a to-be-evaluated CPU micro-architecture, evaluating the performance of the to-be-evaluated CPU micro-architecture; configuring at least one to-be-monitored event and a target test code; a virtual CPU is controlled to execute the target test code, and event operation data corresponding to all the to-be-monitored events in the code execution process are collected; the virtual CPU is created on the basis of the to-be-evaluated CPU micro-architecture; and determining performance evaluation information of the CPU micro-architecture based on the event operation data. According to the scheme, the blank that the CPU micro-architecture performance evaluation method is lacked in the pre-silicon stage is filled, and the CPU micro-architecture performance is evaluated on the premise that tape-out is not needed.

This invention discloses a method and system for booting bare-metal programs for the ARM64 architecture based on QEMU and U-Boot. The method includes the following steps: installing the QEMU emulation program to provide a virtualization environment supporting the ARM64 architecture; QEMU uses the virt machine type to simulate the running platform of the bare-metal program; compiling the U-Boot bootloader to provide loading and booting functions for the bare-metal program; writing and generating the bare-metal program; generating an SD card image and using it as a virtio device; and booting and running the U-Boot bootloader through QEMU, where U-Boot loads environment variables from the SD card image file and executes the bare-metal program. This invention enables the compilation, loading, and execution testing of embedded programs without relying on real hardware.