34results about How to "Increase in scale" patented technology

An analog / digital converter has a charge circuit that has a charge capacitor storing an electric charge commensurate with an input current, and first and second discharge circuits that discharge the electric charge stored in the charge capacitor. While the charge capacitor is charged for a predetermined charge period, every time a predetermined amount of electric charge is stored in the charge capacitor, the electric charge stored there is discharged by the first discharge circuit. After the charge period, the electric charge remaining in the charge capacitor is discharged by the second discharge circuit. Based on the number of discharges performed by the first discharge circuit and the discharge duration of the second discharge circuit, a digital value of the voltage commensurate with the amount of electric charge with which the charge capacitor has been charged is outputted. This offers a wider input dynamic range combined with an enhanced minimum resolution without requiring complicated external control, and in addition allows measurement to be performed in less time.

Disclosed is a canceller device comprising a subcanceller for compensating the sampling phase shift of a plurality of analog-to-digital convert circuits for receiving a common input analog signal, converting the analog signal into digital signals responsive to respective sampling clock signals with different phases to each other, and for outputting the digital signals, a main canceller for canceling echo / cross-talk from the signal output from analog-to-digital convert circuits whose the sampling phase shifts have been compensated, and a compensation range selection circuit for determining the range of the sampling phase shift for being compensated by the subcanceller based on the tap coefficients of the main canceller.

For restricting a scale increase of a switch device using a shared buffer, segments are received at input ports with each phase being shifted and are each composed of a predetermined length data in which each data is connected in series by a predetermined number. The segments are written in shared buffers at the same address in sequence for each segment, where the shared buffers are provided in parallel by the predetermined number. The address for each output port set in each segment is stored each time the writing is performed and the stored address is referred to in the sequence for each output port thereby to read each predetermined length data based on the address referred to from each shared buffer. Each predetermined length data read is connected in series and outputted to each output port.

A data transmission system is made up from: a transmission circuit (100) for generating and transmitting a data sequence in which the abundance ratio of each value for each prescribed data length is fixed, and a reception circuit (101) for, based on the abundance ratio of each value of a data sequence transmitted from the transmission circuit (100), correcting the offset voltage of a signal detection circuit (3) that detects values of the data sequence.

The radiation imaging apparatus includes: a correction data acquiring unit configured to acquire, from image data captured in a predetermined imaging mode, offset correction data corresponding to the predetermined imaging mode; a switching unit configured to switch an acquisition mode for acquiring the image data, depending on the predetermined imaging mode; and an image processing unit configured to subtract the offset correction data from a radiation image of an object to perform an offset correction process.

Disclosed are an image processing device, a printing apparatus, an image processing method, and a program capable of making processing common among printing modes to simplify an entire image processing flow in image processing based on a plurality of printing modes with different definition. An image processing unit 14 includes an image size adjustment unit 20 which adjusts the size of an input image, and a halftone processing unit 24 which performs halftone processing on the input image size-adjusted by the image size adjustment unit 20 to generate a halftone image. The image size adjustment unit 20 adjusts the input image to the same size in two or more printing modes among a plurality of printing modes with different definition, and the input image of the same size is subjected to halftone processing in the halftone processing unit 24.

A switching power supply apparatus, including a power converting device body configured to switch DC input power through a first switching element to thereby store the DC input power in an inductor, and to transfer the stored power to an output capacitor through a second switching element by use of resonance of the inductor, a control circuit configured to drive the first and second switching elements to alternately turn ON or OFF the two switching elements, to thereby resonate the inductor, and an overload detecting circuit configured to detect a load state of the power converting device body based on a peak value or an effective value of a resonance voltage generated from the resonance of the inductor, to thereby control operation of the control circuit.

The video processing circuit includes a boundary detection unit that detects a specific boundary, which is a part of a boundary of a first pixel for which an applied voltage designated by the video signal is less than a first voltage, and a second pixel for which the applied voltage is more than a second voltage larger than the first voltage, the specific boundary being determined by tilt azimuth of the liquid crystal, and a replacement unit that replaces an applied voltage to a liquid crystal element corresponding to the first pixel with a predetermined voltage from the applied voltage designated by the input video signal when the applied voltage designated by the video signal is less than a third voltage smaller than the first voltage with respect to the first pixel adjacent to the specific boundary.

An image capturing apparatus comprises: an image sensor including a pixel region including a plurality of pixel units, arranged in a matrix, each having first and second photoelectric conversion units, and a storage unit provided for each column; and a driving unit configured to drive the image sensor by, for each pixel unit to be read of the plurality of pixel units, exclusively selecting an operation of combining a signal of the first photoelectric conversion unit and a signal of the second photoelectric conversion unit for each pixel unit and outputting the combined signal to the storage unit, an operation of reading a signal from the first photoelectric conversion unit of each pixel unit to the storage unit, or an operation of reading a signal from the second photoelectric conversion unit of each pixel unit to the storage unit.