67results about How to "Less memory space" patented technology

A device for recording hand-written information in the form of characters, symbols, graphs, drawings, calligraphy and similar hand-written information defined by a hand movement, comprises recording means (3) which are adapted to be moved by a hand which carries out the hand movement and to record a plurality of images with partially overlapping contents while the recording means are being moved. The device further comprises image-processing means (4) which are adapted to determine the relative position of the images with the aid of the partially overlapping contents for providing a description in digital format of how the unit has been moved and, in this way, a digital representation of the hand-written representation. A method of recording hand-written information is also disclosed.

The present invention relates to processing location information access requests. An identifier of a sender of a received location information access request is determined, and the identifier is compared to identifiers in a contact storage. Location access control information and/or supplementary contact information associated with an entry having a matching identifier in the contact storage is then retrieved.

Computer-assisted procedure (501/502) to communicate data in a transportation system (90) that physically transports objects (800) from first to second locations (10, 20). The objects (800) have write/read memory tags (300). Prior to communicating data is separated into meta-data M and content-data C. Communicated are: C on the tags (300), M through a computer network, and type-data T (representing M) on the tags. System computers (901, 902, 900) perform complementary methods for forwarding (501) and retrieving (502). To forward (501) data from the first location (10), a first computer (901) queries (510) an exchange computer (901) with M for T according to a predefined T-to-M table, writes T to the tags (300), and writes C to the tags (300). To retrieve (502) data at the second location (20) where the objects arrive, a second computer (902) reads T from the (300), queries (550) the exchange computer (900) with T for M according to the same table, and reads (560) C from the tags (300).

The invention relates to a method for storing code symbols and additional control information in a processing means of an encoder of a communication system. In particular, the invention relates to the storing of code symbols together with additional control information in an interleaving memory (IM) of an interleaver. According to the invention, a combining means (COM) combines respective data bits (I, Q) forming a respective code symbol with their associated control bits into a control information/code symbol data word of a predetermined number (K) of bits. A control information/code symbol encoding means (CI/CS-ENC) encodes the control information/code symbol data words into encoded data words of a smaller number of bits. This data word with a smaller number of bits is then stored at a particular memory location in the interleaving memory (IM).

A method and apparatus for filtering a received Orthogonal Frequency Division Multiplexed (OFDM) signal to reduce noise. The ODFM signal includes a plurality of symbols n in the time direction, each symbol including a plurality of sub-carriers k in the frequency direction, each a-th sub-carrier of each symbol being transmitted as a pilot sub-carrier with known amplitude and phase, and each symbol having its pilot sub-carriers spaced by b sub-carriers relative to the adjacent symbol. An m-tap filter is utilized for producing a filtered version of a selected pilot sub-carrier to be used in subsequent interpolation, by inputting into respective taps of the m-tap filter, m pilot sub-carriers surrounding the selected pilot sub-carrier. The m pilot sub-carriers each satisfy a relationship between n and k, wherein the relationship defines a diagonal line in the n-k plane.

A method of efficiently recovering a database that can be applied to a mobile communication terminal employing a flash memory as a storage medium is provided. In the flash memory, a database (DB) storage area and a DB recovery area are separately allocated. Images of pages in the DB storage area that are objects to be changed are sequentially read and stored in a memory buffer, and the original images of the pages before change are assigned sequential serial numbers and backed up in the DB recovery area. Then, the images of the pages in the memory buffer are changed according to a transaction. This series of jobs is performed with respect to all pages that are the objects of change. Then, each page in the DB storage area that is the object of the change is updated with a corresponding changed page in the memory buffer. If the mobile communication terminal is abnormally terminated without successfully performing this update, when the terminal is booted again, it is confirmed whether or not the serial number of the last page in the DB recovery area matches the total number of pages stored in the DB recovery area. If the serial number matches the total number, with the original image of the page before modification stored in the DB recovery area, the corresponding page in the DB storage area is recovered.

A programming language syntax that embeds object type declaration in the object name. The objects are self-documenting because its object type is embedded in each object. In one embodiment, the object type-declaration prefix precedes the object name and explicitly declares the object type information. For example, a SQL object FirstName, may be implemented as SQL@FirstName, a URL object may be implemented as URL@FirstName, environment object from an environment table may be implemented as ENV@user.

A method and a device for abstracting instruction sequences in a computer program. First, a control flow graph of the program is generated and analysed in order to detect multiple occurrences of a same instruction sequence (504, 506). Then, a function including the longest sequence common to at least two instruction sequences from a plurality of sequences having a common instruction sequence of equal or shorter length compared to the longest sequence is created (512). Finally, the original occurrences of the instruction sequences in the plurality of sequences with a reference to a proper position in the newly created function are deleted and a reference to a proper position in the created function inserted instead (514).

A method of executing division and an electronic apparatus implementing the method are provided. In the method, an auxiliary divisor is retrieved from a look-up table stored in the electronic apparatus, the auxiliary divisor being a predetermined number generated by the product of the powers of the integer two and the reciprocal of the divisor. In the method, the division is executed in the electronic apparatus by multiplying the dividend of the division by the auxiliary divisor. The result of the division is scaled in the electronic apparatus in order to represent it in the desired form by shifting the result obtained by multiplying.

A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.

A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.

A method is provided for decoding data packets in wireless communication schemes that use a Hybrid Automatic Repeat Request technique, and a receiver for wireless communication that performs such a method. The HARQ memory incorporated in a receiver for wireless communication is minimized to a size which only reserves memory for an average number of erroneous sub-packets. Following decoding, an error check is performed on a per sub-packet basis, and only the softbits of those sub-packets for which decoding errors have been detected are stored in the HARQ memory. Correctly decoded sub-packets are stored in a separate memory. This significantly decreases the size of the HARQ memory required at the receiver which is beneficial in terms of both silicon area and power consumption.

Methods of providing component-based software in a plurality of binary images, linking the component-based software, and updating the component-based software, and an information storage medium having software recorded thereon are provided. The information storage medium having software recorded thereon includes at least one software component, a symbol table in which address information of symbols used by the software component is recorded, and memory map information recording memory address information indicating where the software component and the symbol table are loaded.

A system and a method for dynamically generating response motions of a virtual character in real time and a computer-readable recording medium thereof are provided. The system includes a balance state module, response graph module, and a tracking control module. The balance state module calculates a balance state of the virtual character according to the balance-related information of a character model of the virtual character. The response graph module is coupled to the balance state module for providing a response motion according to the balance state. The tracking control module is coupled to the response graph module for providing a driving information according to the response motion and a body information of the character model. The driving information is used for driving the character model to converge toward the response motion.

A method is disclosed that employs a hierarchical path database generator for accessing internal signal or port names in a design hierarchy of an integrated circuit design. The method comprises the steps of inputting design files into the hierarchical path database generator; and said hierarchical path database generator determining ports and signals in said design files, and storing the names of said ports and signals in a hierarchical database in a logical hierarchical order. The method comprises the further steps of providing a testcase to verify a defined aspect of the integrated circuit design; parsing the testcase to identify all signal and port names therein; and for each of the signal and port names identified in the testcase, inputting said each name into the hierarchical path database generator, and obtaining from that generator a hierarchical path associated with said each signal and port name.

The invention provides an apparatus for processing data items in a data source, and an equivalent method. More specifically, the apparatus is configured to reduce a lattice representation of data items in a data source. The apparatus has a processor that is operable to retrieve data items from the data source and to determine a context defining relationships between data items and one or more properties associated with the data items. An initial lattice data structure is generated based on the determined context. The processor then reduces the size of the lattice by dividing the initial lattice data structure into a plurality of subgroup lattice, reducing the size of each of the subgroups of lattice, and combining them to form a reduced lattice data structure.