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A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures / tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables / data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation.

It is possible to achieve compatibility between suppressing dark current caused by a leak phenomenon and ensuring element reliability in a CMOS solid-state imaging device. When a pixel using electrons as signal charge is driven, the negative voltage level of each of control signals adapted to pulse-drive transistors in the pixel is adjusted so that the longer the charge accumulation time, the higher the voltage level. Preferably, the negative voltage level is grounded (GND) when no signal charge is accumulated. The negative voltage level is increased only when the charge accumulation time is long, which is the case where dark current caused by a leak phenomenon becomes a problem. Therefore, it is possible to suppress stress on the pixels and the gate oxide film of their drive circuits and degradation of the transistor characteristics even if dark current is suppressed.