135 results about "Dynamic power management" patented technology

An electronic device (e.g., computer system, etc.) employing dynamic power management of the present invention adjusts power consumption in accordance with an analysis of parameters and events occurring over one or more time-periods. Preferably, the electronic device monitors microprocessor, operating system, peripheral and / or device-level events and adjusts run-time parameters, such as microprocessor clock frequency and voltage, to reduce power consumption with minimal perceived degradation in performance.

A method and system for enabling directed temperature / power management at the DIMM-level and / or DRAM-level utilizing intelligent scheduling of memory access operations received at the memory controller. Hot spots within the memory subsystem, caused by operating the DIMMs / DRAMs above predetermined / preset threshold power / temperature values for operating a DIMM and / or a DRAM, are avoided / controlled by logic within the memory controller. The memory controller logic throttles the number / frequency at which commands (read / write operations) are issued to the specific DIMM / DRAM based on feedback data received from the specific DIMM / DRAM reaching the preset threshold power usage value.

A system and method to provide source controlled dynamic power management. An activity detector in a source determines expected future resource usage. Based on that expected usage, the source generates a power management command and sends that command to a destination. The destination then adjusts the power level of the resource based in the command.

According to the present invention, methods and apparatus are provided for static and dynamic power management of computer systems. A power authority manages power usage levels in computer systems by monitoring power consumption levels and providing power consumption information to the various systems. In one example, the power authority updates power tables to vary aggregate power consumption levels.

A power management system and method permit the total power consumption by a portable electronic device to be reduced so that the portable electronic device has a longer operating time on a limited power source, such as a battery. The system may also be used with devices that are powered by a more permanent source of power. The system may combine static power management techniques as well as dynamic power management techniques. The system may include a flexible clock generator.

In a communications system, such as a Power-Over-Ethernet system, where power supply equipment (PSE) supplies power to powered requiring devices (PRDs), a system and method of dynamic power management is implemented. The system and method monitors the power consumed at each port by the PRDs. Based on this monitoring, the PSE dynamically determines the minimum power which can be allocated to each PRD, and so dynamically maximizes the available reserve power. The PSE maintains a queue or queues wherein PRDs are listed in order of a power allocation priority. When additional power is available, the PSE preferentially allocates power to a PRD or PRDs which have higher priority. The system and method of the present invention minimizes the power allocated to each individual network device, as a result of which the total number of network devices that can be supported with the available power may be maximized.

Methods and systems are provided for dynamically managing the power consumption of a digital system. These methods and systems broadly provide for varying the frequency and voltage of one or more clocks of a digital system upon request by an entity of the digital system. An entity may request that the frequency of a clock of the processor of the digital system be changed. After the frequency is changed, the voltage point of the voltage regulator of the digital system is automatically changed to the lowest voltage point required for the new frequency if there is a single clock on the processor. If the processor is comprised of multiple processing cores with associated clocks, the frequency is changed to the lowest voltage point required by all frequencies of all clocks.

A dynamic power management system for USB hub and method thereof are described. The dynamic power management system includes a host device, a power unit and a hub device. A power management module disposed in the hub device dynamically adjusts the power-supplying statuses of ports in the hub device and further reduces the cost of power transformer externally connected to the hub device.

The invention provides an energy consumption management method for an embedded system, implemented by dynamic power supply management support module, comprising: policy management module, idle detection module, and performance detection module, where the policy management module makes effective power supply management at system layer so as to implement system performance and power saving, and gives attention to idle state and executed load of system, and self-adaptively regulates equipment idle time according to system task executing state and makes the system enter a corresponding low-power state when the idle time continues to a certain extent; the idle detection module provides idle information of CPU and operating system and monitors the idle thread or activity of a given working load in the operating system and provides policy-making parameter information for the policy management module; and the performance detection module monitors CPU utilization ratio and utilization conditions of main memory and provides accurate executed load information for the policy management module.

A power management system for digital circuitry uses data buffer monitoring to determine appropriate processor clock speed or voltage. This allows a processor to be switched from a low power state to a high power state when a monitored data buffer level feeding data to a power intensive application is greater than a second memory buffer level. The processor is switched from a high power state to a low power state when the monitored data buffer level is less than a first memory buffer level.

An electronic device (e.g., computer system, etc.) employing dynamic power management of the present invention adjusts power consumption in accordance with an analysis of parameters and events occurring over one or more time-periods. Preferably, the electronic device monitors microprocessor, operating system, peripheral and / or device-level events and adjusts run-time parameters, such as microprocessor clock frequency and voltage, to reduce power consumption with minimal perceived degradation in performance.

Provided is a technique for power and performance management of one or more storage devices. With a power and performance management agent, a power change notification identifying a power set point is received and a power state of at least one storage device is adjusted.

A system for dynamic power management in a distributed architecture system on chip, comprising a means for dynamically defining the feasibility of entering a low power mode of operation based on the status of components of the system, a means for entering or exiting safely from a low power state based on said feasibility, a means for decreasing the power centric communication between various processors and a means for increasing the low power mode time. Thus a framework is proposed in the instant invention wherein all the device drivers dynamically maintain the information on the feasibility of a low power transition at any point of time. Thus whenever an opportunity to enter a low power mode comes up one has to just check this feasibility variable to determine whether the low power mode entry is viable or not. For ensuring the safe transition to a low power mode, a stalling machine is proposed in case of DSPs. For further saving power, a power centric communication channel is established between various processors and to reduce the load on this communication channel techniques like quad-ring buffer and DSP feedback are proposed.

Various embodiments of methods and systems for dynamically adjusting a peak dynamic power threshold are disclosed. Advantageously, embodiments of the solution for peak dynamic power management optimize a peak dynamic power threshold based on estimations of real-time leakage current levels and / or actual power supply levels to a power domain of a system on a chip (“SoC”). In this way, embodiments of the solution ensure that a maximum amount of available power supply is allocated to dynamic power consumption for processing workloads at an optimum performance or quality of service (“QoS”) level without risking that the total power consumption (leakage power consumption+dynamic power consumption) for the power domain exceeds the power supply capacity.

A system and method to provide source controlled dynamic power management. An activity detector in a source determines expected future resource usage. Based on that expected usage, the source generates a power management command and sends that command to a destination. The destination then adjusts the power level of the resource based in the command.

Systems, apparatuses, and methods for managing power usage of integrated circuits. One or more processor cores may be powered down when the system is idle. Even if there is no user activity, the processor core(s) may be woken up periodically for background downloads to retrieve the latest status for social media and other applications. Additionally, a power management unit may track the average number of active cores and the average core utilization. If the average number of active cores is less than a first threshold and the average core utilization is less than a second threshold, the power management unit may generate a request to offline one or more cores. Still further, when the processor's skin temperature is above a threshold and all of the cores are operating at the lowest acceptable operating point, one or more cores may be powered down.

Provided is a method and apparatus for transmitting data based on OFDM (Orthogonal Frequency Division Multiplexing). The method includes: forming a plurality of packets suitable for a selected transmission mode from data input to a transmitter; determining a transfer rate of the data; when the data transfer rate is determined to be low and synchronous connection oriented link should be maintained, dividing each of the plurality of packets into a plurality of sub-packets; and transmitting the divided sub-packets, wherein when the divided sub-packets are transmitted, a power supply duration of the transmitter is reduced by using a DPM (dynamic power management) or fine state control unit.

A radio frequency (RF) receiver utilizing dynamic power management for administration of power consumption. The RF receiver includes an RF antenna, an RF full band filter, an RF amplifier, an RF sub-band filter, a first local oscillator, an RF mixer, a first IF amplifier, an IF wide band filter, a second local oscillator, an IF mixer, two secondary IF amplifiers, an IF narrow band filter, a digital signal processing subsystem, three power sensors, and a control logic subsystem. Based on its location in the system, each power sensor has a unique threshold setting that is set just below a total RF power level where desired signal degradation might occur. The control logic subsystem utilizes outputs of the power sensors to detect a total RF power present due to interfering signals plus a desired signal within an entire bandwidth present at each stage and dynamically manages power by adjusting bias of each stage accordingly via its bias control outputs.

A method and system for improving spatial reuse in a wireless local area network (WLAN) by per-client dynamic power management. Each access point of the WLAN associates each of its clients with a minimum power level. A central controller of the WLAN generates a schedule for transmission at different power levels, and each access point varies its transmission power level based on the schedule. An access point transmits data packets, at the scheduled transmission power level, to clients associated with a minimum power level that is less than the scheduled power level.

A multi-core processor system, a dynamic power management method thereof and a control apparatus thereof are provided. In the method, a workload of a multi-core processor during a runtime stage is obtained. Next, a hot-plug operation is respectively performed on a plurality of slave cores according to the workload and a working state of each slave core. Then, a bus master status and the working state of a boot core are monitored to determine whether to power off the boot core, in which the bus master status is generated by combining a plurality of device statuses reflected by a plurality of peripheral devices. Finally, when the bus master status is determined as idle, the boot core is powered off.

A system and method for dynamic power management in a processor design is presented. A pipeline stage's stall detection logic detects a stall condition, and sends a signal to idle detection logic to gate off the pipeline's register clocks. The stall detection logic also monitors a downstream pipeline stage's stall condition, and instructs the idle detection logic to gate off the pipeline stage's registers when the downstream pipeline stage is in a stall condition as well. In addition, when the pipeline stage's stall detection logic detects a stall condition, either from the downstream pipeline stage or from its own pipeline units, the pipeline stage's stall detection logic informs an upstream pipeline stage to gate off its clocks and thus, conserve more power.

A consumer electronic product (e.g., a portable media player ported to a media delivery accessory) is powered by a limited capacity DC power source (such as a battery or mini-fuel cell). The consumer electronic product limits the maximum allowable sound pressure level (SPL) that can be produced by the speakers. In one embodiment, the maximum allowable SPL is based upon an amount of stored energy available in the limited capacity DC power source.

The invention provides an embedded system based dynamic disc power management method, which divides the state of a disc on a dynamic power management structure by expanding magnetic disc power management on the dynamic power management structure and sets contents in a command register of a disc controller by reading and writing I / O ports so that the magnetic disc is switched from a high power consumption state to a low power consumption state. The invention provides a method for changing disc state based on reading and writing the disc register and also a method for acquiring disc loading by reading and writing I / O requests; in addition, the invention realizes disc strategy optimization by using a renewed theory model algorithm and verifies the favorable performance thereof by experiments. Therefore, a method for realizing dynamic disc power management is completely provided.