8results about "Error coding/decoding sychronisation" patented technology

A method for link transition in a USB device includes transmitting a plurality of first RS-FEC blocks by a first transmitter (S502), receiving an UNBOND set by a receiver (S504), waking up a second transmitter by a LASM when the receiver receives the UNBOND set (S506), transmitting a training sequence by the second transmitter (S508), transmitting a specific pattern sequence by the second transmitter after finishing transmitting the training sequence (S510), determining whether a current RS-FEC block to be transmitted by the first transmitter is a DESKEW block (S512), stopping transmitting the specific pattern sequence if the current RS-FEC block is determined to be the DESKEW block (S514), and transmitting a plurality of second RS-FEC blocks by the first transmitter and the second transmitter (S516).

A forward error correction (FEC) synchronization method includes establishing a link between a source terminal and a sink terminal, transmitting a tagged symbol periodically from the source terminal to the sink terminal, identifying the tagged symbol by the sink terminal after the tagged symbol is received by the sink terminal, collecting a plurality of symbols transmitted from the source terminal for generating a plurality of FEC blocks received by the sink terminal after the tagged symbol is successfully identified, and synchronizing the plurality of FEC blocks between the source terminal and the sink terminal according to the tagged symbol. The tagged symbol includes predefined patterns.

An arrangement for providing privacy in a communication network. In the arrangement privacy is applied in two steps, wherein the first part comprises using a Hamming code privatizing data in a network. After applying the Hamming code, it is determined how much additional differential privacy is required for fully privatizing the information. Then the information is fully privatized using a differential privacy method.

An arrangement for providing privacy in a 3G communication network. In the arrangement privacy is applied in two steps, wherein the first part comprises using a Hamming code, ordered such that adjace

Systems and techniques for conditionally processing compute resources are described herein. A data payload is received. Parity data is removed from the data payload to generate a codeword dataset. Frames are identified in the codeword dataset. Headers of the frames are evaluated using a conditional decoding map. The frames are marked based on a destination in the headers found in the conditional decoding map. A set of target codewords are identified from the frames based on the marking. Remaining frames of the frames outside the set of target codewords are discarded. The set of target codewords is transmitted to a buffer of a conditional decoder. Codewords from the buffer are decoded using the conditional decoder.

The application provides an adaptive SerDes architecture and power consumption adjustment method based on FEC, which comprises an analog front end, an analog-to-digital converter, a digital signal processor, a sending side forward error correction encoder, a receiving side forward error correction decoder, a microprogram controller and the like, wherein the sending side forward error correction encoder encodes data by adding an additional error correction code to the transmission data; the receiving side forward error correction decoder decodes the transmission data, identifies and corrects errors occurring in the data transmission process through the added error correction code; the microprogram controller is used for real-time monitoring of the sending side forward error correction encoder and the receiving side forward error correction decoder, and reading back the log information of the sending side forward error correction encoder and the receiving side forward error correction decoder. The technical scheme of the application can adaptively balance the signal quality and power consumption of the SerDes, and has good applicability in different product scenarios and different PVT states of chips.

Systems and techniques for are described herein. A data payload is received. Parity data is removed from the data payload to generate a codeword dataset. Frames are identified in the codeword dataset. Headers of the frames are evaluated using a conditional decoding map. The frames are marked based on a destination in the headers found in the conditional decoding map. A set of target codewords are identified from the frames based on the marking. Remaining frames of the frames outside the set of target codewords are discarded. The set of target codewords is transmitted to a buffer of a conditional decoder. Codewords from the buffer are decoded using the conditional decoder.