15 results about "Feedforward amplifiers" patented technology

The present disclosure relates to a radio frequency power amplifier system (200) comprising a first input port (114) and a second input port (121). The radio frequency power amplifier system (200) comprises a main amplifier (101) having an input (107) and an output (108), and a first auxiliary amplifier (102) and a second auxiliary amplifier (122) having respective inputs (109, 129) and outputs (110, 128). The radio frequency power amplifier system (200) comprises an internal load (103) connected to the output (110) of the first auxiliary amplifier (102), a feedback network (104) having an input (111) connected to the output (110) of the first auxiliary amplifier (102) and an output (112) connected to the input (109) of the first auxiliary amplifier (102). The radio frequency power amplifier system (200) further comprises a feedforward amplifier (123) having an input (124) and an output (130). The inputs (107, 129, 109) of the main amplifier and the auxiliary amplifier are interconnected with a first input port (114) at a common input node (113), the output (128) and the second input port (121) of the second auxiliary amplifier (122) are interconnected with an input (124) of a feedforward amplifier (123) at a common node (127), and the outputs (130, 108) of the feedforward amplifier (123) and the main amplifier (101) are interconnected at a common output node (125). The main amplifier (101) is a replica of the first auxiliary amplifier (102) with increased gain, and the second auxiliary amplifier (122) is a replica of the first auxiliary amplifier (102).

Provided are feedforward amplifier circuit, audio amplifier and audio playing device, including: a main amplifier circuit, an adder circuit, a sub-amplifier circuit and a subtractor circuit, wherein the main amplifier circuit adds distortion to a first input signal to output a distorted signal, and inputs the distorted signal to the adder circuit and the subtractor circuit for performing feedforward correction; the sub-amplifier circuit amplifies a second input signal and serves as a positive input of the subtractor, so that a signal gain output by the subtractor is equal to a signal gain of the main amplifier; the subtractor circuit, with the distorted signal as a negative input, reversely amplifies the distorted signal and afterwards performs feedforward; and the adder circuit superimposes the distorted signal output by the main amplifier circuit and the reversely amplified distorted signal output by the subtractor, so as to output a distortion-free signal.

The present disclosure proposes a coil sensor circuit including a sensor coil configured to provide an AC sensor signal, a feedforward amplifier stage configured to amplify the AC sensor signal to obtain an amplified sensor signal, a feedback amplifier stage coupled between an output and an input of the feedforward amplifier stage and configured to provide a control signal for cancelling a DC offset of the feedforward amplifier stage, and a switching circuit The switching circuit is configured to, during a first operational mode of the coil sensor circuit, couple the sensor coil to the input of the feedforward amplifier stage, and, during a second operational mode of the coil sensor circuit, decouple the sensor coil from the feedforward amplifier stage, and increase a gain of the coil sensor circuit with respect to the first operational mode.

The invention relates to a circuit system (200) for regulating a power supply, comprising: a feed-forward amplifier (100) comprising a clock generator (10) comprising a switching detector circuit (12) for generating a feed-forward enable signal upon detection of a switched input clock signal, and a load circuit (20) for generating a current during a function demand, wherein the load circuit (20) comprises a feed-forward pass gate for receiving a feed-forward enable signal, load circuitry (24), a variable bias voltage controller, and a level shifter (22) for controlling the feed-forward pass gate.

A feedforward amplifier circuit, an audio amplifier, and an audio playback device relate to the field of feedforward amplifier circuits. The amplifier circuit comprises: a main amplifier circuit, an adder circuit, an auxiliary amplifier circuit, and a subtractor circuit. The main amplifier circuit adds distortion to an input signal to output a distorted signal, and inputs the distorted signal into the adder circuit and the subtractor circuit for feedforward correction. The auxiliary amplifier circuit amplifies the input signal and uses it as the positive input of the subtractor, so that the signal gain output by the subtractor equals the signal gain of the main amplifier. The subtractor circuit uses the distorted signal as a negative input, reversely amplifies the distorted signal, and then performs feedforward. The adder circuit superimposes the distorted signal output by the main amplifier circuit with the reversely amplified distorted signal output by the subtractor, and outputs a distortion-free signal. By eliminating the reliance on the open-loop frequency-amplitude characteristics and feedback loop of the main amplifier, the circuit structure and component parameter selection are simplified, and costs are saved.

A feedforward circuitry system for regulating voltage includes a voltage regulator for generating a regulated voltage, a bias generator operatively connected to the voltage regulator for generating a sub-threshold gate bias, a plurality of coupling capacitors, at least one of the coupling capacitors operatively connected to the bias generator for reading the sub-threshold gate bias and a feedforward amplifier operatively coupled with at least one of the coupling capacitors, characterized in that the plurality of coupling capacitors being configured to direct AC-couple an output transition of CMOS logic gates. A method for regulating voltage in a feedforward circuitry system through a direct AC-coupling is also provided.

The present invention relates to a circuitry system (200) for regulating power supply, characterized by: a feedforward amplifier (100) comprising a clock generator (10) and a load circuit (20) for producing current during functional requirements; wherein the clock generator (10) comprises a toggle detector circuit (12) for generating feedforward enable signal when toggling input clock signal is detected; wherein the load circuit (20) comprises a feedforward pass gate for receiving feedforward enable signal, a load circuitry (24), a variable bias voltage controller and a level shifter (22) for controlling the feedforward pass gate.

The invention discloses an off-chip capacitor-free LDO (Low Dropout Regulator) circuit, which belongs to the technical field of LDO circuits and comprises an error amplifier EA, a power tube MP, a dynamic compensation circuit, a transient enhancement circuit, a feed-forward amplifier, a compensation capacitor Cc and a feedback module. The dynamic compensation circuit is used for copying the load current and mirroring the load current to the output end of the dynamic compensation circuit, so that the equivalent output impedance of the dynamic compensation circuit changes along with the change of the load current, the dynamic compensation circuit and the compensation capacitor Cc form a variable zero point to follow an output pole and track the displacement of a secondary pole so as to realize frequency compensation in a full-load range, and the system stability is improved. The feed-forward amplifier is used for reducing output impedance, pushing an output pole away from an original point, and further improving system stability. The transient enhancement circuit is used for amplifying an overshoot or undershoot signal generated at the output end of the LDO circuit and mirroring the overshoot or undershoot signal to the grid electrode of the power tube MP when the load current has a step, so that the output voltage of the LDO circuit is adjusted by adjusting the power tube MP, and the transient response capability of the LDO circuit is improved.

A feedforward amplifier comprises a power amplifier that generates an amplified signal, an error correcting circuitry that generates a first error signal and a second error signal based on an error in the amplified signal; and an output circuitry. The output circuitry comprises: a first quadrature coupler, an output of a first error amplifier is connected to the quadrature coupler and an input of the first error amplifier is configured to receive the first error signal, and an output of a second error amplifier is connected to the quadrature coupler and an input of the second error amplifier is configured to receive the second error signal. The output circuitry generates an error compensation signal in the first quadrature coupler from the output signals of the first and second error amplifiers.

The invention discloses an LDO quick response circuit with a zero suppression function based on an MNMC architecture. The LDO quick response circuit comprises a feedforward compensation circuit module, a first-stage amplification circuit module gm1, a second-stage amplification circuit module gm2 and a third-stage amplification circuit module gm3, wherein the first-stage amplification circuit module gm1, the second-stage amplification circuit module gm2 and the third-stage amplification circuit module gm3 are sequentially connected; the feed-forward compensation circuit module comprises a feed-forward capacitor Cmf0, and a feed-forward amplifier gmf0, a feed-forward resistor Rf0 and a feed-forward amplifier gmf1 which are connected in sequence; the input end of the feed-forward amplifier gmf0 is connected to the input end of the first-stage amplification circuit module gm1, the output end of the feed-forward amplifier gmf1 is connected between the second-stage amplification circuit module gm2 and the third-stage amplification circuit module gm3, and the two ends of the feed-forward capacitor Cmf0 are connected to the input end and the output end of the feed-forward amplifier gmf1 respectively. By introducing the feed-forward compensation circuit module, a low-frequency left half plane (LHP) zero point is constructed to counteract the limitation of a secondary dominant pole on the bandwidth, so that the system bandwidth is effectively expanded, meanwhile, the high-frequency alternating-current gain is also improved, the secondary dominant pole is pushed away to a higher frequency band, and the overall frequency response characteristic of the circuit is optimized.

Tuning of carrier and intermodulation cancellation loops of a feed-forward amplifier at a radio transmitter occurs. For the CC loop, in an absence of carriers, a preheating process comprises enabling: a main power amplifier of the CC loop and tone(s) operatively coupled to an input of the feed-forward amplifier; tuning the CC loop using the tone(s) occurs to determine tone CC loop tuning parameters, which, when a carrier is about to be keyed at the radio transmitter are used to determine carrier CC loop offsets that are applied to the CC loop. For IMDC loop tuning, the preheating process is modified to enable an error power amplifier of the IMDC loop and tone(s) within the main power amplifier path to determine tone IMDC loop tuning parameters which, when a carrier is about to be keyed are used to determine carrier IMDC loop offsets that are applied to the IMDC loop.

The invention provides a feed-forward circuitry (1) for regulating a voltage, comprising: a voltage regulator (12) for generating a regulated voltage; a bias generator (14) operably connected to the voltage regulator (12) for generating a sub-threshold gate bias; a plurality of coupling capacitors (16), at least one of the plurality of coupling capacitors (16) being operably connected to the bias generator; and a feed-forward amplifier (18) operably coupled with at least one of the plurality of coupling capacitors, characterized in that the plurality of coupling capacitors (16) are configured to be AC coupled with an output of the CMOS logic gate. The invention also discloses a method for regulating the voltage in the feed-forward circuitry (1) by AC coupling.

The present invention discloses a drive circuit and transmitter architecture for a laser in a transmitter. The drive circuit may include a transcoding module, a retiming module, a pulse generation module, an asymmetric feedforward amplifier module, a first current summing module, a high-pass filtering module, a low-pass filtering module, a push-pull driver module, a pre-driver module, and a second current summing module. In the technical solution of the present invention, due to the provision of the first and second current summing modules, PAM4-type current signal conversion can be performed at the output end of the asymmetric feedforward amplifier module. The large capacitive load at the output end is shared by the summing node, so that the parasitic capacitance of the drive circuit itself is reduced when outputting a third PAM4-type current signal, avoiding the concentrated superposition of large loads at the output end of the second current summing module, thereby significantly reducing the power consumption of the drive circuit.

The feedforward amplifier (40) includes: a power amplifier (13) that generates an amplified signal (S a ); an error correction circuit (21) that generates a first error signal (S a ) and a second error signal (S 1e ) based on an error in the amplified signal (S 2e ); and an output circuit (22). The output circuit includes: a first quadrature coupler (23) to which an output terminal of a first error amplifier (24) is connected, and an input terminal of the first error amplifier is configured to receive the first error signal (S 1e ), and an output terminal of a second error amplifier (25) is connected to the quadrature coupler (23), and an input terminal of the second error amplifier is configured to receive the second error signal (S 2e ). The output circuit generates an error compensation signal in the first quadrature coupler (23) according to output signals of the first and second error amplifiers (24, 25).

A system includes an analog amplifier 10 configured to generate an output signal VOUT based on a received input signal VIN, and a sidecar amplifier 12 coupled to the analog amplifier and configured to generate a compensation signal VCOMP. The compensation signal is applied to the analog amplifier to correct a signal offset associated with the analog amplifier. The sidecar, or feedforward amplifier, comprises a plurality of amplifier stages (20, 22, 24, Fig.2), each amplifier stage having a respective gain at least 10 decibels smaller than an overall sidecar amplifier gain. The sidecar amplifier may include auto-zeroing circuitry to auto-zero an output of at least one of the amplifier stages, and at least one of the amplifier stages may be split among a plurality of signal paths (Fig.3) including a first and a second signal path, where the auto-zeroing circuitry alternatingly performs auto-zeroing on the one path whilst enabling the other path to perform amplification. The sidecar amplifier may have a single path (Fig.4) with the compensation signal stored on an output capacitor (46, Fig.4) during an auto-zeroing phase. A method of correcting a signal offset associated with the analog amplifier by use of a sidecar amplifier, is also provided.