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307results about "Subscriber line interface circuits" patented technology

Subscriber line interface circuitry

A subscriber line interface circuit apparatus includes a signal processor having sense inputs for sensed tip and ring signals of a subscriber loop. The signal processor generates linefeed driver control signals in response to the sensed signals. The signal processor resides on an integrated circuit die. In another embodiment, a subscriber line interface circuit apparatus includes a signal processor generating subscriber loop control signals in response to sensed tip and ring signals from the subscriber loop. A linefeed driver portion drives the subscriber loop in accordance with the subscriber loop control signals. The linefeed driver portion provides the sensed tip and ring signals. Each of the linefeed driver portion and the signal processor resides on an integrated circuit die. In one packaging implementation, the signal processor and the linefeed driver portion reside on separate integrated circuit die within separate integrated circuit packages. In another packaging implementation, the signal processor and linefeed driver portion reside on separate integrated circuit die within the same integrated circuit package. In yet another packaging implementation, the signal processor and the linefeed driver portion reside on the same integrated circuit die. Regardless of packaging, the common mode and differential mode components are calculated by the signal processor rather than the linefeed driver.
Owner:SILICON LAB INC

Apparatus for facilitating combined POTS and xDSL services at a customer premises

In accordance with one aspect of the invention, an apparatus is provided for facilitating combined xDSL and POTS communication across a two wire pair. The apparatus includes a first communication port for communication with a central office across a two wire pair, and a second communication port for communication with a customer premises across a two wire pair. A splitter, or tap, is disposed at the first communication port for splitting a combined xDSL and POTS signal into a first and second signal path. A low pass filter is disposed in the first signal path for filtering the xDSL signal from the combined signal in the first signal path, leaving only the low-frequency (POTS frequency) signals. A circuit is disposed in the second signal path that is configured to filter the POTS signal from the combined signal, leaving only the xDSL signal. The circuit is further configured to terminate the xDSL signal and regenerate it at a lower amplitude and higher frequency than the original xDSL signal of the combined signal. Finally, an adder is configured to combine the POTS signal on the first path with the regenerated xDSL signal on the second path, and output the result to the second communication port (for entry into the customer premises).
Owner:IKANOS COMMUNICATIONS

Interrupt mechanism using TDM serial interface

An improvement to split-architecture audio codecs such as those defined by the Audio Codec '97 specification (AC '97) includes an interrupt mechanism which allows an event at an analog peripheral device such as an incoming call to be sensed by the AC analog sub-system and initiate a wake up procedure in the split-architecture audio codec system. The interrupt mechanism includes a masked interrupt register which is responsive to an interrupt signal from an audio source, such as a ring detect from an incoming telephone line. Either the AC controller sub-system or the peripheral analog device via the AC analog sub-system can initiate a wake up procedure. The AC controller sub-system includes a static divide by 256 counter responsive to a bit clock signal. The bit clock signal is sensed at the AC controller sub-system to determine an operating mode. Upon detection of at least 256 bit clock cycles after a predetermined minimum time for the AC analog sub-system to be in a halted or sleep mode, a wake up interrupt register is enabled in the AC controller sub-system. The interrupt sensor is opto-coupled to the AC analog sub-system, and the interrupt signal from the interrupt sensor is communicated to the AC controller sub-system via the five-wire TDM serial bus between the AC analog sub-system and the AC controller sub-system.
Owner:AVAGO TECH WIRELESS IP SINGAPORE PTE
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