The invention discloses a flat panel display, which comprises a plurality of pixel electrodes, a first multiplexer, a second multiplexer, a third multiplexer and a gate driver. The gate driver is electronically connected with the pixel electrode, and provided with N plus 1 shift registers. The nth shift register comprises an SR trigger, a first transistor and a second transistor. When the flat panel display is turned off, a turning-off control signal is converted from a high potential voltage to a low potential voltage, so as to switch an input low power supply voltage outputted from the first multiplexer to a high operating voltage, switch a zeroth input time pulse signal outputted from the second multiplexer to a high operating voltage and switch a first input time pulse signal outputted from the third multiplexer to a high operating voltage, thereby resulting in conduction of the first transistor or the second transistor, and the nth output signal outputs the high operating voltage to allow the pixel electrodes to take discharge action. By using the turning-off control signal, all pixel electrodes can take discharge action, so as to eliminate afterimage during the turning-off.