16 results about "Interleave sequence" patented technology

The embodiment of the application provides a communication method and a communication device, the method comprises the following steps: a first communication device determines K1 information bits from an initial transmission information bit sequence according to the number K1 of retransmission information bits; K1 is a positive integer smaller than K, K is the length of the initial transmission information bit sequence, and K is a positive integer; a first to-be-encoded bit sequence is obtained according to the K1 information bits, the first to-be-encoded bit sequence comprises the K1 information bits, and the positions of the K1 information bits in the first to-be-encoded bit sequence are determined according to reliability; a first encoded bit sequence is obtained by performing polar code encoding on the first to-be-encoded bit sequence; a first interleaved bit sequence is obtained by performing interleaving processing on the first encoded bit sequence according to a retransmission interleaving sequence, the retransmission interleaving sequence is associated with an initial transmission interleaving sequence; and a symbol sequence corresponding to the first interleaved bit sequence is output. The method can improve the error correction performance and reduce the complexity of retransmission by reducing the value of K1.

The present invention discloses a chaotic interleaver and data interleaving method based on elementary cellular automata. The method comprises the following specific steps: S1, determining the data packet length, interleaving depth, and chaotic interleaver system model of the chaotic interleaver; S2, setting the initial parameters and state of the chaotic interleaver system based on the elementary cellular automata; S3, iteratively generating data by the chaotic interleaver system according to the set parameters; S4, mapping the generated data into an interleaving sequence; S5, checking whether the interleaving sequence meets the interleaving depth requirement. If not, the method returns to step S3; if it meets, the method executes step S6; S6, obtaining the data to be interleaved, and then interleaving the data according to the interleaving sequence of step S5. The interleaver of the present invention has better performance than traditional interleavers such as block interleavers and chaotic interleavers. Moreover, the parameters are controllable, easy to optimize, and after the parameters are determined, a large number of interleavers can be generated quickly.

The application provides a concurrent vulnerability verification method and device, electronic equipment and readable storage medium, applied to the computer kernel security field, including: obtaining a first interleaved sequence in the computer kernel; the first interleaved sequence includes: a plurality of memory operation instructions; the plurality of memory operation instructions executed according to a target condition are used to trigger a concurrent vulnerability; adding a breakpoint before each memory operation instruction in the first interleaved sequence to obtain a second interleaved sequence and execute; the breakpoint is used to make the memory operation instruction after the breakpoint enter a waiting state; based on the memory operation instruction entering the waiting state and the target condition, the trigger information of the concurrent vulnerability is output. The embodiment adjusts the execution order of the interleaved sequence using the breakpoint, so that the execution process meets the target condition, and solves the problems of expected interleaved sequence execution interference and low reproduction efficiency.

An interleaving method and a communication apparatus. The method comprises: on the basis of a PBCH payload interleaver, interleaving a PBCH payload, so as to obtain a first interleaved sequence, wherein the PBCH payload interleaver comprises A positions and values corresponding to the A positions, the A positions correspond to A bits of the PBCH payload on a one-to-one basis, and the value G(j) corresponding to a jth position among the A positions indicates that the bit among the A bits that corresponds to the jth position is interleaved to the G(j) position of the A bits; acquiring a second interleaved sequence having a length of K, wherein the second interleaved sequence is obtained by cascading 24-bit cyclic redundancy check (CRC) to the first interleaved sequence, and K=A+24; and on the basis of a distributed cyclic redundancy check (DCRC) interleaver having the length of K, interleaving the second interleaved sequence, so as to obtain a third interleaved sequence. The method can support PBCH payload interleaving of a PBCH payload with more than 32 bits.

An interleaving method and a communication device, in the method, an A-bit PBCH payload is interleaved based on a PBCH payload interleaver to obtain an interleaving sequence, A is greater than 32, the PBCH payload interleaver comprises A positions and values of the A positions, the A positions are in one-to-one correspondence with the A-bit PBCH payload, the value of the position, corresponding to one bit indicated by a half frame in the PBCH payload, in the A positions is 0, and the value of the position, corresponding to one bit indicated by a half frame in the PBCH payload, in the A positions is 0; the values of the positions corresponding to C bits related to time or frequency indication in the PBCH payload are 1 to C, and the values of the positions corresponding to Nsfn SFN bits in the PBCH payload are serial numbers of Nsfn positions of which the reliability is located at the last Nsfn bit from the (C + 1) th position to the (A-1) th position in the PBCH payload. According to the method, payload interleaving of PBCH payloads exceeding 32 bits can be supported, and the effects of protecting key bits and improving PBCH decoding performance can be achieved.

The invention discloses a communication method of a power domain non-orthogonal multiple access system based on a symmetric Hamming distance constellation and a related device, and the method comprises the steps: carrying out the coding and bit interleaving processing of information bit sequences of two users, and obtaining corresponding bit interleaving sequences; modulating the bit interleaving sequence to obtain a corresponding modulation symbol sequence, and determining transmission power; based on the symmetric Hamming distance, determining a mutual constellation arrangement function according to the modulation orders of the modulation symbol sequences of the two users; based on a mutual constellation arrangement function, performing mapping superposition according to the modulation symbol sequence and the transmission power through a joint constellation mapper to obtain a superposed symbol sequence; transmitting the superposed symbol sequence through a transmission channel to obtain a received signal; and decoding the received signal by adopting an iterative soft demodulation and decoding mode, and recovering the decoding bit sequences of the first user and the second user. According to the method, the correlation between the users is established based on the mutual constellation arrangement function to reduce the interference between different user constellations.

An interleaving method and a communication device, in the method, a PBCH payload is interleaved based on a PBCH payload interleaver to obtain a first interleaving sequence, the PBCH payload interleaver comprises A positions and values corresponding to the A positions, the A positions are in one-to-one correspondence with A bits of the PBCH payload, and the A positions are in one-to-one correspondence with A bits of the PBCH payload; the value G (j) corresponding to the j-th position in the A positions indicates that the bit corresponding to the j-th position in the A bits is interleaved to the G (j)-th position of the A bits; a second interleaving sequence with the length of K is obtained, the second interleaving sequence is obtained by cascading the first interleaving sequence with 24-bit cyclic redundancy check (CRC), and K = A + 24; and interleaving the second interleaved sequence based on a distributed cyclic redundancy check (DCRC) interleaver with the length of K to obtain a third interleaved sequence. According to the method, PBCH payload interleaving of PBCH payloads exceeding 32 bits can be supported.

The present application relates to the technical field of wireless communications, and provides an interleaving method and apparatus and a deinterleaving method and apparatus, aiming to support the interleaving of sequences having different numbers of CRC bits. The interleaving method comprises: a first communication device acquires a first bit sequence, the first bit sequence comprising A information bits and L check bits; and the first communication device interleaves the first bit sequence on the basis of a first interleaving sequence or a second interleaving sequence, wherein in the first interleaving sequence, the number of positions corresponding to information bits is A, and the number of positions corresponding to check bits is L; in the second interleaving sequence, the number of positions corresponding to information bits is Kmax, and the number of positions corresponding to check bits is L; and in a target interleaving sequence, the number of positions corresponding to information bits is Kmax, and the number of positions corresponding to check bits is Lmax. The described solution provides support for an interleaving sequence whose check bit length L is less than or equal to Lmax, and can be applied to interleaving operations in different scenarios.

The invention provides an interleaving and de-interleaving method and device, aims to support interleaving of sequences with different CRC check bit numbers, and relates to the technical field of wireless communication. Wherein the first communication device obtains a first bit sequence, and the first bit sequence comprises A information bits and L check bits. The first communication device interleaves the first bit sequence based on the first interleaving sequence or the second interleaving sequence. Wherein in the first interleaving sequence, the number of positions corresponding to the information bits is A, and the number of positions corresponding to the check bits is L. The number of the positions corresponding to the information bits in the second interleaving sequence is Kmax, and the number of the positions corresponding to the check bits is L. The number of the positions corresponding to the information bits in the target interleaving sequence is Kmax, and the number of the positions corresponding to the check bits is Lmax. Based on the scheme, the interleaving sequence supporting that the check bit length L is smaller than or equal to Lmax is provided, and the interleaving sequence can be applied to interleaving operation of different scenes.

The embodiment of the present application provides a time delay reporting method, which comprises the following steps: reporting target time delays corresponding to data in multiple specific positions in a data stream, wherein the multiple specific positions are spaced apart by a fixed length; wherein: the period of the multiple specific positions corresponds to the length of one or more convolution interleaving sequences, the specific positions correspond to delay lines with the maximum or minimum introduced time delay in the convolution interleaving; or, the period of the multiple specific positions corresponds to the length of one or more distribution sequences, each of the distribution sequences corresponds to eight sub-sequences after distribution; or, the period of the multiple specific positions corresponds to an integer multiple of N data blocks, each of the N data blocks corresponds to a forward error correction (FEC) code word, N is a positive integer, and the length of each data block is: 120 bits, or 128 bits, or 110 bits, or 126 bits. According to the scheme, time delay can be accurately reported.

The present application relates to the field of communications, and discloses a communication method and a communication apparatus. The method comprises: on the basis of a number K1 of retransmission information bits, a first communication apparatus determines K1 information bits from an initial transmission information bit sequence, where K1 is a positive integer less than K, K is the length of the initial transmission information bit sequence, and K is a positive integer; on the basis of the K1 information bits, obtaining a first bit sequence to be encoded, said first bit sequence comprising the K1 information bits, and positions of the K1 information bits in the first bit sequence being determined on the basis of reliability; performing polar encoding on the first bit sequence to obtain a first encoded bit sequence; on the basis of a retransmission interleaving sequence, performing interleaving processing on the first encoded bit sequence to obtain a first interleaved bit sequence, the retransmission interleaving sequence being associated with an initial transmission interleaving sequence; and outputting a symbol sequence corresponding to the first interleaved bit sequence. The method improves error correction performance while reducing the complexity of retransmission by reducing the value of K1.

The invention discloses a media data processing method and device, equipment, a storage medium and a program product, and relates to the technical field of media data processing.The method comprises the steps that first media data with slice marks are obtained, and the slice marks of the first media data comprise video slice marks and audio slice marks which are arranged in pairs; and performing slicing processing on the first media data according to the slicing mark of the first media data to obtain target media data. According to the method, slicing processing can be carried out according to the same slicing mark, the scene of audio and video interleaving sequence change under different transcoding strategies can be supported, and the problem of audio and video playing lagging under the condition that a client side is adaptive to a code rate is avoided.

The application discloses an interlacing type identification method and device, electronic equipment and storage medium, first, a target sequence composed of multiple frames of data is sequentially filled into a first matrix row by row, and the number of columns of the first matrix is traversed within a preset range; the frame length of a complete frame of data is determined according to the first matrix; the front part of the target sequence is pruned based on the frame length, and multiple intermediate sequences are obtained; the parameters of a convolutional deinterleaver are set according to the frame length, and the intermediate sequences are deinterleaved to obtain multiple first deinterleaved sequences; whether the interlacing type of the target sequence is convolutional interleaving is verified based on the first deinterleaved sequences; if not, the parameters of a matrix deinterleaver are set according to the frame length, and the intermediate sequences are deinterleaved to obtain multiple second deinterleaved sequences; whether the interlacing type is one of matrix interleaving and spiral interleaving is judged according to the second deinterleaved sequences, the intermediate sequences are deinterleaved and verified, the diversity of the interlacing type is considered, and blind identification of the interlacing type is realized.

The present application relates to the technical field of wireless communications, and provides an interleaving method and apparatus and a deinterleaving method and apparatus, aiming to support the interleaving of sequences having different numbers of CRC bits. The interleaving method comprises: a first communication device acquires a first bit sequence, the first bit sequence comprising A information bits and L check bits; and the first communication device interleaves the first bit sequence on the basis of a first interleaving sequence or a second interleaving sequence, wherein in the first interleaving sequence, the number of positions corresponding to information bits is A, and the number of positions corresponding to check bits is L; in the second interleaving sequence, the number of positions corresponding to information bits is Kmax, and the number of positions corresponding to check bits is L; and in a target interleaving sequence, the number of positions corresponding to information bits is Kmax, and the number of positions corresponding to check bits is Lmax. The described solution provides support for an interleaving sequence whose check bit length L is less than or equal to Lmax, and can be applied to interleaving operations in different scenarios.

An interleaving method and a communication apparatus. The method comprises: on the basis of a PBCH payload interleaver, interleaving A bits of a PBCH payload, so as to obtain an interleaved sequence, wherein A is greater than 32, the PBCH payload interleaver comprises A positions and values of the A positions, the A positions correspond to the A bits of the PBCH payload on a one-to-one basis, and among the A positions, the value of a position corresponding to 1 bit indicated by a half frame in the PBCH payload is 0, the values of positions corresponding to C bits related to time or frequency indications in the PBCH payload are 1 to C, and the values of positions corresponding to Nsfn SFN bits in the PBCH payload are the serial numbers of Nsfn positions, the reliabilities of which are located at the last Nsfn bits, among a (C+1)th position to an (A-1)th position in the PBCH payload. The method can support payload interleaving of a PBCH payload with more than 32 bits, and can achieve the effects of protecting key bits and improving the PBCH decoding performance.

The application provides a concurrent defect detection method and system based on read-write relationship, and belongs to the technical field of concurrent defect detection, and comprises the following steps: acquiring an original track, the original track being used for triggering a known concurrent defect of a program to be tested; adjusting a thread scheduling sequence in the original track to generate a first verification track; performing static analysis on the first verification track and the program to be tested to obtain a suspicious read-write relationship; adjusting a thread interleaving sequence in the first verification track according to the suspicious read-write relationship to generate a plurality of second verification tracks; and performing re-concurrent defect testing on the program to be tested by using all the second verification tracks to identify whether the program to be tested has an additional concurrent defect. Through the cooperative mechanism of track generation, static analysis and thread interleaving sequence adjustment, the known defects of the concurrent program can be accurately detected and the potential defects can be explored, so that whether the additional concurrent defect exists in the complex concurrent program can be efficiently and comprehensively detected and verified.