46 results about "Latency jitter" patented technology

The invention belongs to the technical field of computer storage, and particularly relates to a solid state disk data management and efficient storage distribution method, which comprises a data characteristic sensing and classifying unit, a data characteristic sensing and classifying unit, a data processing unit, a data storage unit and a data distribution unit, wherein the data characteristic sensing and classifying unit is configured for analyzing write-in request data flow entering a solid state disk in real time or periodically, extracting various characteristic parameters associated with data blocks and storing the data blocks; classifying the data on the basis of the characteristic parameters, and distributing one or more data classification labels for each data block to be written or stored; and the self-adaptive storage allocation strategy unit is configured to be used for dynamically selecting an optimal physical block for data writing according to the data classification label and in combination with the physical block state information of the current flash memory medium. According to the invention, the solid state disk can better adapt to various dynamic and variable workloads, and especially shows more excellent continuous write-in performance, lower delay jitter and obviously prolonged service life when processing a large amount of random write-in, small block write-in and write amplification sensitive applications.

The invention belongs to the technical field of cache prefetching optimization of a firmware layer of a computer storage system, and particularly provides a memory control method, a storage device, a medium and equipment.The instantaneous flow is effectively filtered and persistent hotspot data is accurately recognized through a three-layer structure of combining a first-stage hotspot filtering module with a window cache, a view queue and a protection queue; the second-stage continuous access filtering module dynamically judges a continuous access mode by means of mean-variance statistics of an annular buffer area, and accidental continuous triggering of prefetching is avoided; and the third-stage random access judgment module prohibits invalid prefetching and effectively distinguishes access modes. The pre-fetching bandwidth is limited through the token bucket algorithm, the global priority queue of the skip list is combined, it is ensured that the priority of the write task is higher than that of the pre-fetching task, pre-fetching and foreground I / O resources are isolated, delay jitter control over foreground key I / O can be achieved during full-load pre-fetching, and the problem that delay soaring is caused when pre-fetching preempts the resources is solved.

The invention belongs to the technical field of data center network and clock synchronization, and discloses a dynamic time synchronization path optimization method and system based on topology awareness. The invention provides a closed-loop framework of state awareness-path optimization-resource assurance-dynamic adjustment and optimization: in the first stage, network topology, link load and PTP message performance data are periodically acquired through an SDN controller, and a global state view is constructed; in the second stage, the optimal path is dynamically calculated for the PTP synchronous flow through a multi-constraint optimization algorithm with the purpose of minimizing transmission delay jitter, and deterministic transmission is achieved in combination with bandwidth reservation and a priority queue; and meanwhile, a seamless switching mechanism of building first and disassembling second is introduced to adapt to the network state change in real time. On the basis of multiplexing existing hardware, the time synchronization error is remarkably reduced, the transmission stability and the dynamic adaptability are improved, microsecond-level time synchronization can be efficiently achieved, and the method is suitable for high-precision service scenes.

The invention relates to the technical field of large language models, in particular to a high-concurrency large language model high-speed reasoning deployment method, which comprises the following steps of: extracting a weight coefficient corresponding to a user identity identifier, an emergency degree numerical value mapped by a request type and a resource occupation value converted by an estimated calculation amount according to the user identity, the request type and the estimated calculation amount; according to the method, the dynamic priority is generated by performing comprehensive operation on the user identity, the request type and the estimated calculation amount, so that differentiated services for reasoning tasks are realized, interactive requests with high urgency degree can bypass batch processing tasks with long time consumption, the response delay and delay jitter of key services are reduced, and the user experience is improved. Meanwhile, according to the complexity of the request text and the geographic coordinates of the user, the task is intelligently routed to the model node with the most suitable scale in the distributed network, so that the wide area network transmission delay is greatly reduced through edge processing, and the computing power waste caused by using a super-large-scale model to process the simple task is also avoided.

Provided are a wireless communication method and device, an AP having an uplink multi-user detection capability in a channel competition stage, so that the AP can reasonably select to grant a TXOP to an STA or the AP based on an uplink service demand quantity and a downlink service demand quantity, thereby reducing the time delay of uplink and downlink data transmission, and alleviating time delay jitter. The wireless communication method comprises: a first STA sending a first PPDU, the first STA having uplink data to be transmitted; wherein the first PPDU comprises a first MAC frame and a first identification field, the first MAC frame is used for competing for a channel, and the first identification field is used for indicating an AID of the first STA; or, the first PPDU comprises a second MAC frame, the second MAC frame is used for competing for a channel, and the second MAC frame is also used for triggering all STAs receiving the second MAC frame to feed back whether a medium needs to be acquired to transmit uplink data.

The present application relates to the technical field of power equipment state monitoring and centralized alarm, in particular to a distributed disconnecting switch operation state centralized alarm system. The system receives state events and operation command records uploaded by the distributed disconnecting switch through the centralized alarm processing end, generates aligned state sequences of the same operation process according to the event time, message sequence and the last trusted state; obtains state transition residuals through the software state machine containing stable split position, stable closed position and transition state, and generates topological consistency residuals in combination with the one-time system topological constraint relationship, and forms time consistency residuals according to the command issuing time, the first variable position time and the final stable state time. The system can distinguish the real disconnecting switch operation abnormality from the data abnormality caused by message disorder, delay and jitter, and improve the reliability of centralized alarm judgment and the consistency of alarm object positioning.

An event timing-based method and apparatus for fiber-optic frequency transfer are provided, relating to the fields of time-frequency transfer and precision time measurement. According to the method, an event timer is used to detect a time stamp of each rising edge of a radio frequency (RF) signal, which reflects a link delay jitter, a reference time stamp is subtracted from the time stamp to obtain a phase error, and an actuator is driven to compensate the phase error, thereby improving tolerance of a system to link noise while ensuring the stability of optical frequency transfer. Thus, the link delay jitter is suppressed, ensuring that a phase of an output transferred beam remains in long-term stability with a phase of an input reference light.

The invention discloses a networking delay dynamic sensing and intelligent compensation method for a distributed test system. According to the method, a technical system of'high-precision perception-intelligent prediction-dynamic compensation-robust guarantee 'is constructed aiming at the networking delay and time variation problem caused by fixed delay, variable delay and system-level errors in a distributed test system; a subnanosecond clock synchronization reference is established through an IEEE 1588 (PTP) precision time protocol; unidirectional delay accurate measurement is realized based on a PTP delay request-response mechanism; modeling and predicting the delay time sequence by adopting an ARIMA (Autoregressive Integrated Moving Average) model, and sending an instruction in advance through dynamic forward compensation so as to achieve a quasi-synchronization test; and the test continuity and the precision controllability when the network state dramatically changes are ensured by combining the self-adaptive model updating and abnormal backspacing mechanism. According to the method, the time sequence synchronization precision and the environmental adaptability of the distributed test system are remarkably improved, and the technical problem that a traditional method is difficult to deal with delay jitter and dynamic change is solved.

The invention belongs to the field of remote direct memory access, and discloses a bitmap-based RDMA (Remote Direct Memory Access) data packet out-of-order receiving circuit and method, a bitmap checking module verifies the validity of a data packet and outputs a bitmap switching identifier, and a bitmap management module maintains pointer information through three states of order, out-of-order and bitmap updating; the bitmap information storage module is used for storing bitmap information, calculating the offset of a bitmap writing pointer in an out-of-order state and starting a fragmentation timeout mechanism, generating a window sliding enable signal when the bitmap state is updated, the bitmap information storage module responds to the enable signal to execute bitmap writing and window sliding updating, and the bitmap pointer storage module manages a multi-queue bitmap state identifier and a pointer in an RAM (random access memory) structure. By adopting the circuit, the bandwidth waste and congestion risk caused by retransmission can be obviously reduced; the tail delay jitter is reduced; and the adaptive capacity to multi-path network disorder is enhanced, so that the bandwidth utilization rate and the transmission reliability are comprehensively improved.

This invention relates to the field of data processing technology, specifically to a method for dynamic positioning of page elements based on an adaptive waiting strategy. The method involves extracting latency jitter data and combining it with the historical loading characteristics of the target page to obtain a waiting time limit. Within this limit, the method monitors the internal mounting state, visual visibility state, and layout stability state of the target node. When the internal mounting state of the target node is ready, but the visual visibility state and layout stability state assessments fail, the geometric size feature weights of the target node are stripped, and node data of the internal mounting state is extracted. An undirected graph data structure is constructed to downgrade and anchor the target node. When the target node is downgraded and its local node block is already mounted to the page node tree, the nearest ancestor node container that has completed layout rendering is backtracked as a reference to construct a safe interaction boundary. Before the overall webpage resources are fully loaded, interactive operations are performed on target nodes that have not escaped the safe interaction boundary.

This invention discloses a method for non-disruptive switching of redundant control based on deep learning and reinforcement learning, belonging to the field of redundant control technology in industrial automation. To address the problems of switching output jumps, process quantity fluctuations, and erroneous switching caused by network latency jitter, state asynchrony, and inconsistent integral filtering states in dual-machine hot standby or multi-controller redundant architectures, as well as the lack of reliable and rapid rollback after online upgrades, this invention collects primary and backup process quantities, control outputs, synchronization states, and latency data. It utilizes deep learning to assess consistency and switching risks, employs meta-reinforcement learning to generate parameterized progressive fusion takeover curves and evaluates them in shadow mode. Combining feature representation drift and control performance drift hysteresis gating, it determines takeover or rollback, achieving state alignment, non-disruptive takeover, and automatic rollback in case of anomalies, reducing switching deviations and shortening recovery time.

The invention relates to a VxWorks hybrid message transmission method based on dual-channel isolation and dynamic traffic shaping, and belongs to the technical field of embedded real-time operating system communication. According to the transmission method of the mixed message in the VxWorks system, the UDP message delay jitter and the UDP message packet loss rate are effectively reduced, the bandwidth utilization rate of the TCP message is improved, and a standardized solution of mixed flow cooperative transmission is provided for the VxWorks system.

The invention discloses a video dynamic transmission code rate adjustment method based on soft terminal bandwidth perception, and the method comprises the steps: obtaining the transmission bandwidth, the packet loss rate and the delay jitter of a detection data packet in real time during transmission, carrying out the transmission abnormality recognition according to the transmission bandwidth, the packet loss rate and the delay jitter, and carrying out the transmission abnormality recognition. The method comprises the steps of obtaining a bandwidth state level, carrying out code rate matching according to the bandwidth state level and a multi-dimensional key factor to obtain a target code rate, and completing seamless switching of the code rate in cooperation with a server according to the target code rate. According to the invention, the video lagging rate can be reduced, and the bandwidth utilization rate can be improved, so that the bandwidth can be matched with the optimal image quality in different use scenes.

The application belongs to the technical field of cache prefetch optimization of the firmware layer of a computer storage system, and specifically provides a memory control method, a storage device, a medium and equipment, through a three-layer structure of a primary hot spot filtering module combined with a window cache, an apprentice queue and a protection queue, transient traffic is effectively filtered, and persistent hot spot data is accurately identified; a secondary continuous access filtering module uses mean-variance statistics of a ring buffer to dynamically determine a continuous access mode, and avoids accidental continuous triggering of prefetch; a tertiary random access judgment module prohibits invalid prefetch, and effectively distinguishes access modes. The application limits prefetch bandwidth through a token bucket algorithm, and combines a skip list global priority queue to ensure that the priority of a write task is higher than that of a prefetch task, so that resources of prefetch and foreground I / O are isolated, when full-load prefetch is performed, foreground critical I / O delay jitter can be controlled, and the problem of delay soaring caused by resource preemption of prefetch is avoided.

This invention relates to a lock-free I / O scheduling method, apparatus, and storage medium for cloud PCs. Responding to a client session request initiated by a client, the method controls a metadata coordinator to allocate storage nodes to the client and, within those storage nodes, allocates I / O shards for the client, obtaining allocation information. The metadata coordinator then returns the allocation information to the client, and the client caches this allocation information to facilitate the use of the allocation information to fulfill I / O requests. Each I / O shard includes an I / O thread bound to a first CPU core, a data plane development toolset driver, a storage performance development toolset driver, a first lock-free circular buffer, and a second lock-free circular buffer. By binding the CPU core and using lock-free circular buffers, thread switching, lock contention, and most memory copying are eliminated, reducing I / O processing latency from milliseconds to hundreds of microseconds and significantly reducing latency jitter.

The invention relates to the technical field of homogeneous soft partitioning hybrid SSD data processing, in particular to a homogeneous soft partitioning hybrid SSD data processing method and system. Comprising the following steps: step 1, extracting and forming a multi-dimensional I / O feature vector; 2, monitoring the internal state of the firmware in real time; 3, predicting a workload intensity index at a future moment; step 4, dividing the predicted I / O state into an I / O peak, an I / O steady or an I / O valley; 5, calculating the comprehensive priority of the internal tasks; step 6, obtaining normalized load intensity; step 7, calculating a scheduling decision score; 8, approving concurrent execution of the internal management task; step 9, dynamically adjusting the proportion of the fast partition; and step 10, monitoring the actual I / O delay of the host end to calculate the real-time QoS deviation degree. According to the method, the performance interference of internal tasks on the I / O of the host is remarkably reduced, delay jitter is avoided, and the QoS stability of the SSD is powerfully guaranteed.

The present application relates to the technical field of data storage, and particularly relates to a distributed multi-level cache and storage method based on hot and cold data label identification, comprising the following steps: collecting the access frequency and access time locality of a data block in real time to generate a dynamic hot and cold label value, wherein the access time locality is the reciprocal of the standard deviation of the access interval in the current time window; distributing the data block to different storage levels according to the dynamic hot and cold label value H, and simultaneously establishing a label mirror queue across the levels, which records the pre-allocated address of the target level; under the service state of the source level, writing a data block copy to the target level address specified by the label mirror queue, and atomically switching the access path after the writing is completed. The present application avoids the delay jitter caused by burst migration, adopts a continuous physical space alignment strategy for the pre-allocated address, reduces the fragmentation rate, improves the sequential write performance of the SSD, and realizes fast resource switching of the migration operation.

The present application belongs to the field of remote direct memory access, and discloses a bitmap-based RDMA data packet out-of-order receiving circuit and method. A bitmap checking module verifies the validity of the data packet and outputs a bitmap switching identifier. A bitmap management module maintains pointer information through three states of sequence, disorder and update bitmap. When in the disorder state, the bitmap management module calculates the bitmap write pointer offset and starts the fragmentation timeout mechanism. When in the update bitmap state, the bitmap management module generates a window sliding enable signal. A bitmap information storage module responds to the enable signal to execute bitmap writing and window sliding update. A bitmap pointer storage module manages multi-queue bitmap state identifiers and pointers in the RAM structure. The circuit can significantly reduce the bandwidth waste and congestion risk caused by retransmission, reduce tail latency jitter, enhance the adaptability to multi-path network disorder, and thus comprehensively improve the bandwidth utilization and transmission reliability.

The invention discloses a prediction-based Internet of Vehicles code retransmission method and system and electronic equipment, and is applied to the field of Internet of Vehicles network transmission. The method comprises the following steps: collecting network states and vehicle motion characteristics of a plurality of transmission paths, and constructing a multi-modal tensor; constructing a prediction model by using a time sequence convolution encoder and an attention mechanism, and predicting a link state; a main path and an auxiliary path are screened according to the prediction result, the main path sends an original data packet, and the auxiliary path sends a polarization adjustment convolutional coding check packet generated based on the predicted packet loss rate; and the edge server carries out decoding by using the verification packet during packet loss, and feeds back a transmission result to update prediction model parameters. According to the method, the problems of high packet loss rate and retransmission delay jitter of the Internet of Vehicles in a high dynamic scene can be relieved by utilizing heterogeneous path cooperative transmission and a prediction-based polarization adjustment convolutional code coding retransmission mechanism, and technical support is provided for Internet of Vehicles services such as automatic driving.

The invention relates to a VxWorks mixed message transmission device based on dual-channel isolation and dynamic traffic shaping, and belongs to the technical field of embedded real-time operating system communication. According to the transmission device of the mixed message in the VxWorks system, the UDP message delay jitter and the UDP message packet loss rate are effectively reduced, the bandwidth utilization rate of the TCP message is improved, and a standardized solution of mixed flow cooperative transmission is provided for the VxWorks system.

This invention provides a service transmission method, apparatus, and network device. The method includes: determining a snapshot period based on the service targeted by the satellite, and acquiring a satellite network topology map for each snapshot period; determining a time slot length based on the service targeted by the satellite and the satellite link parameters of the satellite; after acquiring the service, determining the number of hierarchical topology layers based on the tolerance time limit of the service and the time slot length, and dividing the satellite network topology map into several hierarchical satellite network topology maps based on the number of hierarchical topology layers; calculating a deterministic routing forwarding path for the service based on the hierarchical satellite network topology maps, and transmitting the service to the target satellite according to the deterministic routing forwarding path. Therefore, embodiments of this invention can reduce the interference of latency jitter and the impact of communication interruptions during service transmission.

Systems and methods for measuring and assigning network experience scores include collecting end-to-end metric data corresponding to application traffic between one or more clients and one or more servers, the metric data including any of latency, jitter, and packet loss; comparing the metric data with baseline percentile values; assigning one or more scores to one or more segments of a path associated with the application traffic based on the metric data and the baseline percentile values; and aggregating the scores of the one or more segments to produce a single network experience score indicative of overall network performance for the application traffic.

The invention relates to a 5G-TSN high-precision time synchronization method based on dynamic compensation, and belongs to the technical field of wireless communication and industrial network convergence. In order to solve the problem that the time synchronization precision is influenced by propagation time delay non-stationary random jitter caused by multipath fading and terminal mobility during 5G system air interface transmission of a TSN synchronization message, the method comprises the following steps: acquiring a time advance TA and a round trip time RTT through dual-mechanism time delay measurement to initialize a dynamic compensation factor; the factor is used for correcting an air interface propagation delay value in real time, a sliding window anomaly detection mechanism is used for dealing with sudden channel fluctuation, and meanwhile a compensation factor periodic updating and emergency calibration process is set. According to the method, the delay jitter of the wireless air interface is effectively inhibited, the clock synchronization precision and the system robustness of the TSN node under the 5G-TSN network are remarkably improved, and the strict requirement of an industrial control scene for microsecond-level synchronization is met.

This invention discloses an embedded control system for a micro-ROS mobile robot, belonging to the field of robot control system technology. The control system includes a real-time priority communication scheduling module. This module dynamically adjusts the scheduling polling cycle and token generation rate based on a combination of the token bucket algorithm and a priority queue to solve the latency jitter problem in multi-node concurrent communication. This invention, through real-time priority communication scheduling, achieves hierarchical allocation of bandwidth and priority according to message type, ensuring low latency for hard real-time control commands. It solves the latency jitter caused by contention between high and low priority messages in traditional CAN / UART buses, achieving end-to-end low latency, predictable, and reliable control response.

This invention discloses a gating deployment method, device, storage medium, and apparatus. The invention selects the target data transmission link corresponding to the target service flow from a preset time-sensitive network structure, and obtains the node information and GCL capability information corresponding to the target data transmission link. Based on the node information, GCL capability information, and preset time slot scheduling and gating constraints, it determines the time slot scheduling and gating deployment scheme corresponding to the target service flow. The invention then performs gating deployment on the target data transmission link according to the time slot scheduling and gating deployment scheme. This invention rationally deploys the time slot scheduling and gating scheme based on network node capabilities and the latency jitter requirements of time-sensitive service flows. Compared to existing gating schemes that introduce additional jitter at every node where gating is disabled, leading to the inability to meet the latency or jitter requirements of certain service flows, this invention achieves gating deployment in a wider range of scenarios, reduces resource waste, and improves communication efficiency.

The application discloses a data pipeline integration method and system, relates to the technical field of data processing, and solves the problems of poor flexibility and high delay of a traditional data pipeline. The application calculates a customized complexity index CCI based on parameters such as a structural deviation degree Sd through a meta-analysis task request, compares the CCI with a threshold value alpha, and then decides and dynamically assembles a standard or customized dynamic adaptation module to efficiently cope with non-standard data sources and complex logic. Meanwhile, the method selects a batch processing or stream processing mode according to delay requirements, monitors key indicators such as a delay Ld in real time, fits characteristics such as a delay jitter coefficient Jd and a cost-benefit ratio Cb into an adaptive performance index AEI, compares the adaptive performance index AEI with a performance threshold value beta, and drives pipeline closed-loop self-optimization, such as automatic switching of processing modes, so that low delay and high adaptability in SaaS operation and maintenance and other scenarios are ensured.

The application provides a multi-device sound signal transmission method, system and medium based on a heterogeneous protocol. The method comprises the following steps: receiving a multi-device heterogeneous protocol original sound signal stream carrying a protocol type distinguishing mark, a device distinguishing mark and a signal collection time mark; calling preset protocol deconstruction description information according to the protocol type distinguishing mark to strip the protocol encapsulation layer of each signal stream, obtaining a payload sound signal sequence and performing time domain alignment according to the signal collection time mark to generate a synchronous sound signal array; grouping according to the device distinguishing mark and performing cross-protocol waveform distortion compensation and delay jitter elimination on each group of signals to obtain a reconstructed sound signal group; performing transmission scheduling and sequencing on the reconstructed signal based on the time sequence dependence relationship between devices to generate a conflict-free occupation time period allocation scheme and a sending order table; injecting the signal into a transmission bus and generating a synchronous playback control instruction to drive the terminal array to play synchronously. The application ensures the accuracy and reliability of multi-device synchronous playback.

This application proposes a signal delay control method and system based on a carry4 delay chain. The method includes: configuring a target delay time and dividing the target delay time into a coarse delay and a fine delay; using a clock counter based on the FPGA system clock to count and output the coarse delay, obtaining a coarse delay pulse signal; inputting the coarse delay pulse signal into a delay chain combination composed of multiple cascaded carry4 units within the FPGA, and using the delay chain combination to output the fine delay, obtaining multiple initial delay trigger signals; and eliminating delay jitter errors by voting calibration of the multiple initial delay trigger signals to obtain a final delay trigger signal to control the signal delay. This application employs a two-level architecture of clock counter to implement the coarse delay and carry4 chain to implement the fine delay, which can break through the limitation of the FPGA system clock cycle in terms of delay step accuracy, achieving fine delay control much smaller than the clock cycle, and solving the problem of insufficient accuracy in traditional delay methods.

The invention provides a high-speed data transmission system based on a 4G network, and belongs to the technical field of data communication, and the system comprises a radio frequency module which carries out the receiving and transmitting, modulation and demodulation, and signal amplification of a wireless signal; the 4G communication module is used for performing data transmission with the radio frequency module through the protocol stack optimized by the zero copy technology; the control processing module monitors data traffic, performs data transmission with the 4G communication module through dual-traffic path data transmission, and performs data buffer management in the data transmission process; the storage module is used for caching data to be sent and received; and the interface module is used for performing data interaction with external equipment. According to the invention, the problems of limited transmission rate, large delay jitter and insufficient connection stability of the 4G data transmission board card in a complex network environment in the prior art are solved.

The application provides a stator lamination burr online early warning method and system based on acoustic emission spectrum analysis. The method comprises obtaining an effective acoustic emission signal sequence based on spindle phase trigger interception. A hardware DC bias elimination operation is performed on the effective acoustic emission signal sequence to generate a zero mean sequence. Boundary symmetric continuation and discrete wavelet decomposition are performed on the zero mean sequence to obtain a specific level of detail coefficient vector set. The full-band absolute energy of the zero mean sequence and the high-frequency absolute energy of the detail coefficient vector set are calculated in parallel. A single-cycle hardware multiplication is performed on the full-band absolute energy based on an early warning proportionality coefficient and a noise floor prevention constant to generate a dynamic absolute energy threshold. The high-frequency absolute energy is compared with the dynamic absolute energy threshold to output an alarm trigger flag. The application eliminates the delay jitter caused by software scheduling, realizes microsecond-level deterministic response and pre-interception in high-speed stamping scenarios.