2 results about "Serial processor" patented technology

The present invention relates to multi-core processor devices that use multi-threaded processing. Multi-core processors are provided that are configured to improve processing performance in certain computing scenarios. The multi-core processors include a plurality of processing cores that implement bucketed thread processing to execute multiple instruction threads in parallel while ensuring the effects of idle instructions or threads are minimized on the performance of the processor. The plurality of cores can also share a common data cache, thereby minimizing the need for expensive and complex mechanisms to mitigate cache coherency issues. The bucketed thread processing can minimize latency effects associated with the shared data cache. In some examples, the multi-core processor can also include a serial processor that is configured to execute single-threaded program code that can not produce satisfactory performance in a processing environment that employs bucketed thread processing.

The application discloses an SC-LDPC code decoding method and related equipment based on a forward-looking pipeline and aggregated storage, which can be applied to the fields of digital communication and storage technology. When a plurality of serial processors are scheduled by a control module of a decoder to perform iterative calculation on a to-be-decoded SC-LDPC code, all variable nodes and all check nodes corresponding to the to-be-decoded SC-LDPC code are updated based on a forward-looking message update strategy in each processor, so that the problem of pipeline message update lag can be effectively solved. Meanwhile, the same calculation module in the decoder is shared by the plurality of processors in time based on an aggregated storage architecture and an address mapping mechanism, so that the problem of storage resource fragmentation is solved, and then the convergence speed and the throughput of the decoding process are effectively improved. Finally, the final soft information obtained through the iterative calculation is subjected to hard decision to obtain the decoding result corresponding to the to-be-decoded SC-LDPC code, so that the accuracy of the decoding result is improved.