14results about "Frequency demodulator arrangements" patented technology

A switching circuit outputs a modulated signal. A low-pass filter circuit receives the modulated signal and applies low-pass filtering processing at a low-pass cut-off frequency to generate a demodulated signal to a load impedance. A replicating circuit receives the modulated signal and applies a replica of the low-pass filtering processing of the low-pass filter circuit to generate a reference signal. A signal processing circuit applies signal processing to the demodulated signal and the reference signal to generate at least one indicator signal which is indicative of a variation of the low-pass cut-off frequency.

The invention relates to a method and a device for converting an analog input signal into a digital output signal, comprising the following steps: feeding the analog input signal to be converted to an input side of an amplitude modulator with carrier suppression in order to obtain a carrier-free amplitude-modulated signal, a phase-modulated signal is obtained by adding a carrier signal offset by 90 DEG, preferably sinusoidal, to an amplitude-modulated signal output by an amplitude modulator by means of an adder, and the phase-modulated signal is fed to a limiter for suppressing interference amplitude modulation in the phase-modulated signal, the signal output by the limiter is fed to a demodulator and the signal output by the limiter is sampled in the demodulator with at least one sampling clock signal, wherein the phase of the at least one sampling clock signal is dynamically changed to achieve an improved resolution.

The invention relates to the technical field of analog integrated circuits, in particular to a novel low-delay demodulation circuit and system.The constant current generated by a voltage source module is copied to a differential demodulation module through a first current mirror module, so that when an original modulation signal is converted into a non-input signal from an input signal, the constant current is converted into the differential demodulation module; the voltage of the differential demodulation module can be quickly discharged through the first current mirror module, so that the output original signal can be quickly reversed according to the conversion of the differential modulation signal, and the time delay of converting the high-level output into the low-level output after the demodulation circuit is converted is remarkably reduced. Meanwhile, the first current mirror module assists the differential demodulation module to perform voltage discharge, so that the differential demodulation module can improve the amplification capability of the input original modulation signal and obtain the differential modulation signal with higher amplitude and better quality without generating negative influence on the demodulation rate; and the time delay of converting the demodulation circuit from low-level output to high-level output is obviously reduced.

The invention relates to the technical field of analog integrated circuits, in particular to an anti-transient-electric-stress low-delay demodulation circuit and system, and the circuit employs two comparators to compare the positive input and negative input of an original modulation signal with a bias voltage, so that when the original modulation signal is not input, the output original signal maintains a normal low level unchanged; when an original modulation signal is input, no matter whether a positive common-mode transient electric stress event or a negative common-mode transient electric stress event occurs, the levels of the external input ends of the two comparator modules are pulled up or pulled down at the same time, the first level signal and the second level signal can respond to the abnormal event to be overturned to the same level, so that the first level signal and the second level signal are converted to the same level. And original signal output is forcibly set to zero, so that error information generated by a common-mode transient electric stress event is shielded and isolated, and the influence on the accuracy of signal demodulation is reduced. And finally, an error signal caused by a common-mode transient electric stress event when the modulation signal is demodulated is identified and corrected, and the accuracy and the reliability of signal demodulation are improved.

The invention relates to an input device (B) for a controller (S) or for a measuring device, wherein the input device (B) comprises at least one input circuit (1) to provide at least one digital or at least one analog input for a controller (S) or measuring device, wherein the at least one input circuit (1) comprises at least one phase modulation converter (P), wherein the at least one phase modulation converter (P) comprises: - an amplitude modulator (2) with carrier suppression, to which an input signal (SigA) can be supplied on the input side to obtain a carrierless amplitude-modulated signal (SigAM), - an adder (7) to add a carrier signal (SigT90) shifted by 90° to the carrierless amplitude-modulated signal (SigAM) and to obtain a phase-modulated signal (SigPM), - a limiter (11),to which the phase-modulated signal (SigPM) is supplied and with which interference amplitude modulation in the phase-modulated signal (SigPM) can be suppressed, and - a demodulation device (16) to which the signal (SigBA) output by the limiter (11) can be supplied and sampled therein with at least one sampling clock signal (CLK0-CLK3).

The invention relates to an input device, a controller, a measuring device and a use, the input device for the controller or the measuring device comprising at least one input circuit for providing at least one digital input or analog input for the controller or the measuring device, the at least one input circuit comprising at least one phase modulation converter, the at least one phase modulation converter has: an amplitude modulator with carrier suppression, to the input side of which an input signal can be applied in order to obtain a carrier-free amplitude modulated signal; an adder for adding the carrier signal in the preferred sinusoidal form offset by 90 DEG to the carrier-free amplitude modulation signal to obtain a phase modulation signal; a limiter to which the phase modulation signal is applied, with which interference amplitude modulation in the phase modulation signal can be suppressed; and a demodulator to which the signal output by the limiter is applied, in which the signal output by the limiter is sampled with at least one sampling clock signal.

The invention relates to a method for converting an analog input signal (SigA) into a digital output signal (Sigo), comprising the steps: - the analog input signal (SigA) to be converted is fed to an amplitude modulator (2) with carrier suppression to obtain a carrierless amplitude-modulated signal (SigAM); - a 90° shifted, preferably sinusoidal carrier signal (SigT90) is added in an adder (7) to the amplitude-modulated (SigAM) signal output by the amplitude modulator (2) to obtain a phase-modulated signal (SigPM); - the phase-modulated signal (SigPM) is fed to a limiter (11) by means of which interference amplitude modulation in the phase-modulated signal (SigPM) is suppressed; - the signal output by the limiter (11) (SigBA) is fed to a demodulation device (16) supplied and sampled therein with at least one sampling clock signal (CLK0-CLK3),wherein - the phase of the at least one sampling clock signal (CLK0-CLK3) is dynamically changed to achieve increased resolution. Furthermore, the invention relates to a device (1) for converting an analog input signal into a digital output signal.

An input facility for a controller or measurement apparatus includes at least one input circuit for providing at least one digital or at least one analog input for a controller or measurement apparatus, wherein the at least one input circuit includes at least one phase modulation converter that has an amplitude modulator with carrier suppression to which an input signal can be supplied on the input side in order to obtain a carrierless amplitude-modulated signal, an adder for adding a carrier signal shifted by 90° to the carrierless amplitude-modulated signal and for obtaining a phase-modulated signal, a limiter to which the phase-modulated signal is supplied and with which a noise amplitude modulation in the phase-modulated signal can be suppressed, and a demodulation facility to which the signal output from the limiter is supplied and that can be sampled therein with at least one sampling clock signal.

The application discloses a common-mode transient interference suppression circuit and an isolator, and belongs to the technical field of signal transmission. The common-mode transient interference suppression circuit comprises a first-stage high-pass filter, a second-stage high-pass filter, a signal demodulation circuit and a common-mode detection circuit arranged between the first-stage high-pass filter and the second-stage high-pass filter in series connection. The first-stage high-pass filter and the second-stage high-pass filter are used for filtering input signals of a signal receiving end in sequence, outputting differential signals and providing a current discharge channel when common-mode transient interference occurs. The common-mode detection circuit is used for detecting the differential signals, generating a common-mode transient detection result signal and outputting the common-mode transient detection result signal to the signal demodulation circuit. The signal demodulation circuit is used for demodulating the differential signals according to the common-mode transient detection result signal, and obtaining original signals. The application can effectively suppress signal decoding abnormity caused by common-mode transient interference, and improve the anti-common-mode transient interference capability of the isolator.

The present invention provides a single-sideband phase-sensitive detection method, system, device, storage medium, and computer program product, which relate to the technical fields of signal processing and signal amplification and can be applied to signal detection and other situations. Specifically, a target signal in a detection system is repeatedly triggered, the modulation phase of a modulated signal is changed at each trigger time, and the target signal triggered each time is modulated based on the modulated signal to obtain multiple sets of detection signals with different modulation phases. The multiple sets of detection signals are post-processed to obtain multiple sets of equivalent single-sideband modulated signals, and the multiple sets of equivalent single-sideband modulated signals are demodulated to obtain processed signals. This improves the signal detection bandwidth and sensitivity.

A single-sideband phase-sensitive detection method is provided. A time-dependent target signal of a to-be-detected system is repeatedly triggered. A plurality of modulation signal sets varying in modulation phase corresponding to a plurality of triggering moments are generated. The time-dependent target signal is modulated based on the plurality of modulation signal sets corresponding to each of the triggering moments to obtain a plurality of detection signal sets varying in time and modulation phase. The plurality of detection signal sets are processed to obtain a plurality of equivalent single-sideband modulation signal sets. The plurality of equivalent single-sideband modulation signal sets are demodulated to obtain a plurality of processed signals. A single-sideband phase-sensitive detection system, device, storage medium and computer program product are also provided.

Method and device for converting an analog input signal into a digital output signal, wherein the analog input signal is supplied to be converted to the input side of an amplitude modulator with carrier suppression to obtain a carrierless amplitude-modulated signal, an adder adds a sinusoidal carrier signal offset by 90° to the amplitude-modulated signal output by the amplitude modulator to obtain a phase-modulated signal, the phase-modulated signal is supplied to a limiter that is used to suppress interference amplitude modulation in the phase-modulated signal, and the signal output by the limiter is supplied to a demodulator and sampled therein with at least one sampling clock signal, where the phase position of the at least one sampling clock signal is dynamically altered to achieve a higher resolution.

A circuit (10; 10') comprising a switching circuit block (12) comprising a node (SW) configured to provide a modulated signal (PWM); a low-pass filter circuit block (14) coupled to the switching node (SW) of the switching circuit block (12) to receive the modulated signal (PWM), the low-pass filter circuit (14) configured to apply low-pass filtering processing to the modulated signal (PWM) at a low-pass cut-off frequency, providing a demodulated signal (RPL) to a load impedance (Rload) as a result; a replicating circuit block (16) coupled to the switching node (SW) of the switching circuit block (12) to receive the modulated signal (PWM), the replicating circuit (16) configured to apply to the modulated signal (PWM) a replica of the low-pass filtering processing of the low-pass filter circuit (14), providing a reference signal (REF) as a result; a signal processing circuit block (20) coupled to the low-pass filter circuit (14) and to the replicating filter circuit (16), the signal processing circuit block (20) configured to apply signal processing to the demodulated signal (RPL) and to the reference signal (REF), providing at least one indicator signal (Vc, Vpp) indicative of a variation of the cut-off frequency of the at least one demodulator circuit block (14) as a result.

An apparatus, method and computer program is described comprising: obtaining time domain samples of a received radio frequency signal of a mobile communication system, wherein the radio frequency signal comprises a Physical Random Access Channel; determining an estimated power distribution for the time domain samples; determining a filtering threshold value at which a time domain sample is deemed to be due to interference, based on a defined probability level of the estimated power distribution; defining a filtering mask based on the time domain samples and the filtering threshold; and applying the filtering mask to the time domain samples to generate a filtered signal samples, wherein the filtering mask is configured to attenuate time domain samples that are above the filtering threshold.