The invention discloses a
yaml-based automatic
simulation method, which relates to the field of
chip development, and comprises the following steps: S1, defining use case parameters; s2, analyzing the
yaml file and storing parameters; s3, automatically compiling a C program; s4, automatically calling vcs for
simulation; and S5, unified instruction triggering and result feedback. According to the method,
yaml serves as a carrier, parameters are configured in a layered mode through a yaml format, global and local parameter
multiplexing and coverage are achieved, parameter
management efficiency is improved, repeated work is reduced, the parameters can be stored in use case
simulation instructions in a dictionary mode, the simulation instructions of all use cases can be unified, the parameters can be conveniently and rapidly called, tool
collaboration is enhanced, and the use case simulation efficiency is improved. In addition, parameters of different tools can be contained in a yaml mechanism at the same time, the direct running problem of the c use case in
chip development work can be effectively solved, and isolation between the C use case and the UVM environment is eliminated.