15 results about "General-purpose programming language" patented technology

A computer-implemented method, system and computer program product for safely processing integrated flows of messages in a multi-tenant container. Each step in the flows of messages to be processed by the applications in the multi-tenant container is monitored. If the monitored step is determined to run custom logic in a general-purpose programming language, then the flow of messages running such custom logic is suspended from being processed by the application in the container if there are other flows of messages being processed by other applications in the container. Furthermore, new flows of messages are prevented from being processed by the applications in the container. After processing the other flows of messages by the other applications in the container, the suspended flow of messages is now processed by the application in the container. In this manner, the risk of interference with other flows of messages in the container is avoided.

The application provides a compilation method and device of an operator, equipment and a medium, and relates to the technical field of artificial intelligence. The compilation method of the operator comprises the following steps: obtaining operator source code to be compiled, the operator source code being code written in a domain-specific language based on Triton; converting the operator source code into a Triton dialect, performing hardware-independent optimization, the Triton dialect being a hardware-independent dialect based on an MLIR framework and used to represent the computing logic of the operator source code; converting the Triton dialect into a hardware-specific dialect, the hardware-specific dialect being a hardware-related dialect based on the MLIR framework and used to represent hardware-oriented computing logic; generating source code in a general programming language according to the hardware-specific dialect; and calling an LLVM-based compilation tool corresponding to a target chip to generate target code according to the source code in the general programming language. The operator can be applied to chips with different chip architectures.

The invention discloses a stability control device modular modeling system and method based on Matlab / Simulink. The system comprises a stability control device model, an information interaction interface model and a parameter management and display module. The stability control device model comprises a stability control device element-level simulation module, a stability control device system-level simulation module, a stability control device overall control module and a customized integration module; the method comprises the following steps: adding a data interaction interface module and a parameter management and display module based on an engineering verification requirement and a Matlab / Simulink platform and external information interaction requirement; modularized modeling is carried out on a module of the stability control device on a Matlab / Simulink platform by adopting a method of general logic expression module building, general programming language packaging or customized module integration. According to the invention, the hardware requirement on the stability control equipment is reduced, the expansibility and the reuse rate of the simulation module are improved, the adaptability of the simulation system to the simulation of the large-scale stability control system is enhanced, and the flexibility of experimental verification and the experimental efficiency are improved.

The invention relates to a computer implemented method for efficient access to a database via a functional model-based procedure by translating a sequence of operations that are stored in a memory and that is described in the procedure that is specified using a generalized programming language into an intermediate database abstraction layer access language, whereby the intermediate data abstraction layer not being SQL. The method comprises: generating by a processor: an initial builder corresponding to an original originating source, zero or more intermediate operations and a terminating operation; storing in the memory, the sequence of operations, and translating the builder or parts of the builder is translated to at least one operation using the intermediate database abstraction layer access language upon specifying the terminating operation.

The invention discloses a concurrent system information flow security verification method and apparatus, and an electronic device. The invention relates to the field of computer security, in particular to information flow security verification of a concurrent system. Aiming at the technical problem that an existing concurrent system information flow security verification method is difficult to consider function correctness and security, the method abstracts a concurrent system into a concurrent event system, and separates function correctness verification from information flow security verification. The method comprises the following steps: firstly, verifying function correctness by using a dependency-assurance proof technology with annotations; then, information flow security verification is performed based on the verified annotations and assurance conditions. In addition, a universal programming language interface is provided, so that the method is suitable for different programming languages. By adopting the formalized verification and machine certification technology, the method can strictly verify the information flow security of the concurrent system, ensure that sensitive information is not leaked, improve the system security and prevent potential security risks.

The invention provides an operator compiling method and device, equipment and a medium, and relates to the technical field of artificial intelligence. The operator compiling method comprises the following steps: obtaining a to-be-compiled operator source code, wherein the operator source code is a code compiled by adopting a field-specific language based on Triton; the operator source code is converted into a Triton dialect, optimization irrelevant to hardware is carried out, and the Triton dialect is a dialect which is irrelevant to the hardware and based on an MMIR frame and is used for representing computational logic of the operator source code; the Triton dialect is converted into a hardware specific dialect, and the hardware specific dialect is a dialect related to hardware and based on an MMIR framework and is used for representing hardware-oriented computational logic; according to a hardware specific dialect, generating a source code adopting a general programming language; and calling an LLVM-based compiling tool corresponding to the target chip, and generating a target code according to the source code adopting the general programming language. And operators can be universally used for chips with different chip architectures.

A system for Multi-Party Computation (MPC) includes a general-purpose programming language, an MPC processor, an MPC Instruction Set Architecture (ISA), and a compiler. The general-purpose programming language is used for writing an MPC application. The MPC processor executes the MPC application. The MPC ISA corresponds to the MPC processor. The compiler generates an intermediate representation for the MPC application and generates machine code for the intermediate representation by mapping and assembling MPC ISA instructions.

A network verification system uses general-purpose programming language to create network verification tests. A test orchestrator builds a model of the network only using data from the network verification test. An optimization testing manager creates symbolic packets for verification tests using assertions based on a packet library embedded into the testing manager and the general-purpose programming language.

The application relates to the technical field of large model module intelligent agent execution control, in particular to a large model intelligent agent autonomous execution method and system based on a logic management module. The system comprises a world state management module, a logic management module and a large model module. The large model module generates a logic target sentence according to a user instruction, the logic management module generates a logic result according to the logic target sentence, and the user instruction result further generated by the large model module is fed back to the user. The system adopts a multi-module structure, the world state management module uses a general programming language to realize core scheduling, dynamic execution and control, the logic management module is responsible for planning and reasoning to generate a logic result without illusion, and the large model module understands the user instruction. In the embodiment of the application, the logic management module has complete formal logic derivation capability, and all operations have formal checkability, so that illusion is eliminated from the mechanism.

The application discloses a kind of concurrent system information flow safety refinement relationship verification method and device.This method relates to computer security field, especially the verification of information flow safety refinement relationship of concurrent system.Aiming at the technical defects that traditional refinement technology cannot guarantee the security of information flow, the method abstracts concurrent system at design level and implementation level into concurrent event system, and then proves that the concurrent event system at design level and implementation level satisfies the security preserving simulation relationship.It is proved that the security preserving simulation relationship ensures that if the concurrent system at design level satisfies the security specification, the concurrent system at implementation level also satisfies the security specification.In addition, the application provides a general programming language interface, so that the method is applicable to different programming languages.The application strictly verifies the information flow safety refinement relationship of concurrent system using formal verification and machine proof technology, which can be used to prove the information security of large-scale concurrent system and prevent problems from happening.

The application belongs to the technical field of data analysis and visualization, and particularly relates to an intelligent data analysis and visualization generation system based on natural language. The application carries out safe isolation on data through a data specification and safe isolation layer module, avoids direct contact of an external large language model with an original data source, forms safe isolation, can obtain sufficient information at the same time, thereby avoids separately deploying a large language model, reduces economic and management costs, adopts a general programming language to replace a conversion mode of a traditional SQL or DAL, so as to cope with high complexity queries, checks and corrects analysis codes and analysis results through an intelligent correction module, reduces the situation of field or function misuse caused by a large language model illusion problem, explains an analysis process to a user in natural language through an intelligent explanation module, improves user experience, and generates an adapted chart according to user demand through an intelligent visualization module.

Embodiments of the present application disclose a SOC path verification system and method, an electronic device and a storage medium, comprising: a first subsystem realized based on a hardware description language, and a second subsystem realized based on a general programming language; wherein the first subsystem is configured to acquire a SOC path test case realized by the general programming language, and each test stage in the SOC path test case, and start a plurality of test processes corresponding to each test stage respectively; the second subsystem is configured to determine a target general language function corresponding to each test process respectively; each target general language function corresponding to the same test stage is called concurrently by each test process corresponding to the same test stage, a stage test result corresponding to each test stage is obtained, and a path verification result is generated according to each stage test result, which not only guarantees the stability and reliability of the SOC multi-path concurrent verification process, but also improves the efficiency of the SOC multi-path concurrent test.

The invention discloses a simplification method and system based on a Matlab / Simulink stability control system model. The method comprises the following steps: dividing the stability control system model into a control measure execution model and a local strategy search model according to whether the stability control system model has a local strategy; classifying and simplifying the plurality of divided control measure execution models according to a generator tripping principle and a criterion, and performing e file aggregation and simplification on the divided local strategy search model; model simplification is carried out on a Matlab / Simulink platform by adopting a method of constructing a general logic expression module and packaging a general programming language. Compared with the prior art, the method has the advantages that the action result and the action time sequence of the stability control device model are reserved, the modeling efficiency during modeling of the multiple stability control devices of the stability control system is improved, and the adaptability of a simulation system to simulation of the large-scale stability control system is enhanced.

This invention discloses a motion controller program development system based on a general-purpose programming language, relating to the field of motion control software development. The system includes: a program document management module for creating, opening, closing, and synchronously managing the status of multiple motion control program documents, and supporting unified state switching between editing, compiling, running, and debugging states; an integrated editing and debugging module for providing a code editing environment conforming to the syntax of a general-purpose programming language, and integrating compilation control, debugging control, and a real-time communication interface with the motion controller hardware; and a multi-view interactive interface for simultaneously presenting program document identifiers and status views, a code editing view and debugging control panel for the currently active program document, and a program execution status and result output view. This solution reduces the time cost and technical barriers associated with learning dedicated scripting languages, and simultaneously enhances code readability and debuggability.

The invention provides a compiler for generating a combinable kernel. A compiler receives a kernel generator that includes kernel parameterization and code of a set of operators written in a general purpose programming language. For each operator in the set of operators, the compiler degrades the code of each operator into an intermediate representation of each operator in an intermediate language, determines a configuration of each operator based on kernel parameterization and the intermediate representation of each operator, and generating a binary object for each operator in a binary object set of the operator set based on the configuration. The compiler combines the kernel corresponding to the kernel generator based on the binary object set of the operation set and the kernel parameterization.