The disclosure provides a low dropout
linear regulator circuit and a memory, the circuit comprising: a first
transistor, a second
transistor and a
feedback control circuit; the
gate dielectric layer thickness of the first
transistor is less than a preset threshold; the first end of the first transistor and the second end of the second transistor are connected to receive a
power supply voltage; the second end of the first transistor and the first end of the second transistor are connected to output a target
voltage; the control end of the second transistor receives a power-on
control signal, and the second transistor is used to output the target
voltage during the power-on process; the
feedback control circuit is connected with the control end of the first transistor, the
feedback control circuit is used to receive the power-on
control signal, control the first transistor to be disconnected during the power-on process, and control the first transistor to output the target
voltage after the power-on is completed; wherein the power-on
control signal is in an enabled state during the power-on process, and is in a disabled state during the remaining period. The disclosure can reduce the circuit area, avoid
overvoltage and simplify the timing.