6 results about "Pre synaptic" patented technology

The invention discloses a pulse neural network hardware accelerator and a data processing method, and the accelerator is characterized in that a low-power-consumption three-stage pipeline CPU module is used for receiving input data, scheduling an SNN network acceleration instruction, and sending the input data to an asynchronous edge SNN hardware accelerator module through a coprocessor interface; the asynchronous edge SNN hardware accelerator module comprises a pulse data encoding and decoding module, L neuromorphic kernels and an on-chip network, the pulse data encoding and decoding module encodes input data into a pulse form and sends the pulse form into the neuromorphic kernels, and the neuromorphic kernels are used for performing calculation based on the data in the pulse form; the network-on-chip is used for communication between the neuromorphic kernels, and the connection between neurons before and after synapses in the neuromorphic kernels is realized by adopting a synaptic cross array. According to the invention, the data processing acceleration performance can be greatly improved.

This invention relates to the field of neuromorphic computing technology and provides a method and system for dynamic adjustment of synaptic weights in real-time neurofeedback for neuromorphic chips. The method includes: capturing the pulse signals and timestamps emitted by presynaptic and postsynaptic neurons; calculating the time difference between the presynaptic and postsynaptic pulses; when the absolute value of the time difference is less than a preset time window threshold, querying a pulse timing dependency plasticity rule base based on the sign of the time difference to determine the corresponding synaptic weight adjustment type; generating corresponding voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse; and applying a write voltage pulse to the target memristor synapse according to the voltage pulse parameters to adjust its conductance value in situ in real time, thereby dynamically updating the synaptic weights. This invention solves the problems of poor dynamic environment adaptability, low energy efficiency, and high learning latency caused by traditional offline weight update mechanisms.

There is provided a neurosynaptic processing core with spike time dependent plasticity (STDP) learning for a spiking neural network, including: a spiking neuron block including a pre-synaptic block and a post-synaptic block; a synapse block communicatively coupled to the spiking neuron block; a STDP learning block communicatively coupled to the spiking neuron block and the synapse block, the STDP learning block including a pre-synaptic event accumulator including a pre-synaptic spike event memory block and a pre-synaptic spike parameter modifier; a post-synaptic event accumulator including a post-synaptic spike event memory block and a post-synaptic spike parameter modifier, a weight change accumulator, and a weight change parameter modifier; a learning error modulator; and a synaptic weight modifier configured to modify a synaptic weight parameter based on a weight change parameter and a learning error corresponding to the synaptic weight parameter. There is also provided a corresponding method of operating and a corresponding method of forming the neurosynaptic processing core.

Spiking events in a spiking neural network may be processed via a memory system. A memory system may store data corresponding to a group of destination neurons. The memory system may, at each time interval of a SNN, pass through data corresponding to a group of pre-synaptic spike events from respective source neurons. The data corresponding to the group of pre-synaptic spike events may be subsequently stored in the memory system.

The application discloses a kind of video physiological signal dynamic extraction method and device, collect video and carry out face detection and posture correction to each frame video;The corrected face image is divided into micro-grid, and the brightness of each micro-grid is response-delay coding, and the pulse sequence of presynaptic pulse neuron is generated;Through membrane potential model and mutual inhibition between pulse neurons, competition is carried out and combined with connection weight, and the pulse emission time and pulse frequency of postsynaptic pulse neuron are obtained;According to the time difference between presynaptic and postsynaptic pulse neuron, dynamically adjust connection weight;After sorting and screening the pulse frequency of all postsynaptic neurons, it is mapped to the pulse sequence formed by corresponding micro-grid and weighted fusion, and the final pulse wave signal is generated;Finally, the physiological parameters of practitioner are obtained by calculating pulse wave signal, and the connection weight is adjusted by signal quality evaluation, and the strategy optimization of pulse wave signal extraction is realized continuously.

The invention belongs to the technical field of bionic synaptic devices, and particularly discloses a three-terminal voltage gating synaptic device based on a nanofluid channel and a preparation method of the three-terminal voltage gating synaptic device based on the nanofluid channel, and the three-terminal voltage gating synaptic device based on the nanofluid channel comprises a nanochannel layer; the gate control electrode layer is connected with the nano channel layer and is used for applying a gate voltage pulse and simulating a presynaptic membrane; and the epoxy resin layer is coated outside the nano channel layer and the gate control electrode layer. According to the application, independent grid control is introduced, multiple functions of biological synapses can be highly simulated, a device closer to a biological neuron function is provided for neuromorphic calculation, a complex and intelligent calculation system can be constructed, in addition, super-long time-history plasticity is realized by utilizing cation-pi bond interaction, and the calculation efficiency is improved. The method has excellent performance in long-time-history enhancement and long-time-history suppression, and the stability and durability of nonvolatile information storage and processing are improved.