13 results about "Register based" patented technology

The application discloses a large language model weight compression method, an inference operation method, a system and a medium, and belongs to the technical field of large language model weight compression and inference operation optimization. The method comprises the following steps: acquiring a weight matrix of a large language model and constructing an exponential high-frequency window and a benchmark value, classifying and encoding each weight data into a fixed-length code word and splitting the fixed-length code word into an independent bitmap, synchronously generating a compact value stream and a rollback value stream, and packing the compact value stream and the rollback value stream into weight compression data; loading the weight compression data, generating a state mask and a channel prefix mask in a register based on the bitmap, calculating a reading offset by using a population count instruction, reading a compressed data segment from a corresponding data stream, reconstructing weight data in the register in combination with the code word, and finally directly inputting the weight data into a matrix multiplication unit for operation; therefore, by implementing the application, the problem of efficiency reduction caused by control flow divergence and redundant memory access in GPU inference of existing variable-length encoding can be solved, and the model inference efficiency under lossless compression can be improved.

Systems and methods for detecting a collision when combining a first encrypted data structure and a second encrypted data structure are disclosed. The system can receive the first encrypted data structure representative of a first plurality of registers. Each register in the first plurality of registers can have an encrypted fingerprint value, and an encrypted register identifier value. The system can receive the second encrypted data structure representative of a second plurality of registers. The system can calculate a first sum associated with a first register of the first plurality of registers based on the fingerprint value of the first register. The system can calculate a second sum associated with a second register of the second plurality of registers. The system can determine a validity bit associated with the collision based on a comparison of the first sum and the second sum.

The invention discloses a test method, device and equipment and a readable storage medium, and the method comprises the steps: obtaining dependency relationship information between configuration parameters and interface data, and creating a scene class through the dependency relationship information; wherein the scene class inherits the base class of the general verification methodology, and the dependency relationship between the configuration parameters and the interface data is represented by using random constraints; taking configuration parameters in the scene class as random constraint conditions of the configuration parameter class, and performing random value taking on the configuration parameter class; configuring a register based on the configuration parameter class completing random valuing so as to control the corresponding configuration parameters based on the scene class; generating random excitation data by taking the interface data in the scene class as a random constraint condition of interface data excitation data transactions, so as to control and test the corresponding interface data based on the scene class; and after parameter configuration is completed, sending the random excitation data to the to-be-tested interface for testing. According to the invention, the function coverage rate and efficiency of the test can be improved.

Systems and methods for detecting a collision when combining a first encrypted data structure and a second encrypted data structure are disclosed. The system can receive the first encrypted data structure representative of a first plurality of registers. Each register in the first plurality of registers can have an encrypted fingerprint value, and an encrypted register identifier value. The system can receive the second encrypted data structure representative of a second plurality of registers. The system can calculate a first sum associated with a first register of the first plurality of registers based on the fingerprint value of the first register. The system can calculate a second sum associated with a second register of the second plurality of registers. The system can determine a validity bit associated with the collision based on a comparison of the first sum and the second sum.

The present application discloses a data sorting method and hardware accelerator, the method comprising: storing multiple target data into corresponding registers based on the arrangement order of registers; performing a first sorting operation on the target data in the registers, comprising: starting from a first register with a first sequence number, sequentially comparing the target data in two adjacent registers, storing the target data with a larger value into the register that is ranked earlier or later among the two registers involved in the comparison, and storing the target data with a smaller value into the register that is ranked later or earlier among the two registers involved in the comparison; and performing a sub-operation of an intermediate sorting operation on the target data in the registers, wherein the sub-operation includes a second sorting operation and a third sorting operation. The data sorting method improves the sorting efficiency of the target data and reduces the time complexity of the sorting process.

The present invention discloses a Sketch measurement accuracy improvement method based on programmable switch virtualization register, an electronic device, and a medium, comprising: obtaining a Sketch program; setting parameters required for register virtualization, including: a maximum impact threshold θ on the programmable switch bandwidth when virtualizing registers, and the number of register arrays m required to be used. u and the number of registers n in each register array i ; Determine whether to provide and implement virtualized registers based on the physical registers of the programmable switch, the bandwidth of the data recycling channel, and the parameters required for register virtualization; when virtualized registers need to be provided and implemented, determine the virtualized registers; input Sketch data, and store or update the Sketch data through the virtualized registers; the server receives data push from the physical registers of the programmable switch on a periodic basis, while always monitoring the virtualized registers, and restores the Sketch data by fusing the data of the physical registers and the virtualized registers.

The system according to the embodiment comprises a registration unit, a collection unit, an analysis unit, a rewriting unit, and a provision unit. The registration unit registers a user's nationality, gender, education level, and IT literacy level. The collection unit acquires information from various information media based on the information registered by the registration unit. The analysis unit analyzes the information acquired by the collection unit. The rewriting unit rewrites the information analyzed by the analysis unit into a form suitable for the user. The provision unit provides the information rewritten by the rewriting unit to the user.

Mode change detection circuitry detects a mode change when processing circuitry switches between first and second modes of processing in which a first set of architectural registers are designated as having different register lengths. Register mapping circuitry maps architectural registers to corresponding physical registers. For an operation specifying a given architectural register of the first set of architectural registers: in response to a determination that the operation is to be processed in the first mode of processing, the register mapping circuitry maps the given architectural register to a physical register of a first physical register file, and in response to a determination that the operation is to be processed in the second mode of processing, the register mapping circuitry maps the given architectural register to a physical register of a second physical register file separate from the first physical register file and having physical registers of different register length to physical registers of the first physical register file.

The invention provides a key rotation method and system based on a registration center and a medium, and relates to the technical field of information security. The method comprises the following steps: a registration center sets key configuration rotation data registered with an application service instance to be in a rotation detection state, wherein the key configuration rotation data comprises key configuration data and rotation conditions of the key configuration data; the security service equipment periodically obtains the key configuration rotation data in the rotation detection state from the registration center, and if the obtained key configuration rotation data is detected to reach the rotation condition of the key configuration data, new key configuration data is generated and sent to the registration center; and the registration center sends the new key configuration data to the application service equipment, so that the application service equipment updates the application service instance according to the received new key configuration data. According to the key rotation scheme based on the registration center, additional management service does not need to be added, and the security of sensitive configuration data is guaranteed at low cost.

The system according to this embodiment aims to provide quick and accurate answers based on various information sources. [Solution] The system according to the embodiment comprises a registration unit, an analysis unit, a generation unit, and a provision unit. The registration unit registers information sources. The analysis unit analyzes questions based on the information sources registered by the registration unit. The generation unit generates answers based on the questions analyzed by the analysis unit. The provision unit provides the answers generated by the generation unit.

A computer-implemented quantum error correction method performed by a decoding system of a quantum computing system is disclosed Syndrome data is received that is representative of an error state of quantum devices in the quantum computing system. The syndrome data comprises a string of trivial values and non-trivial values, wherein non-trivial values represent symptoms associated with the error state. An index associated with each symptom is determined by loading a chunk of the string into a register and iterating an index determination subroutine that comprises determining a count of continuous trivial values in the register, determining the index associated with the symptom represented by any non-trivial value adjacent to the contiguous trivial values, and shifting values in register based on the count of contiguous trivial values. The syndrome data is then decoded using the determined index associated with each symptom to determine a correction for the error state.

The invention belongs to the technical field of outpatient registration and registration management, and discloses an intelligent hospital outpatient registration and registration information management system. The system comprises a patient doctor-seeing registration module, a department registration confirmation module, a patient identity classification module, a normal patient sorting module, a special patient sorting module, a re-visit patient adjustment module, a doctor-seeing sorting display module, a number calling mode analysis module and a data storage library. According to the method, whether the patient is allowed to be registered or not is judged based on the habitual diagnosis duration, the diagnosis time of the patient can be estimated more accurately through the analysis mode, the situation that resources are wasted or the patient waits for a long time due to a fixed number of registration is avoided, meanwhile, the registered patient is classified, and the registration efficiency is improved. According to the method, different modes of number calling sorting are carried out for different types of patients, number calling is carried out in an interleaving number calling mode, the analysis mode enables the special patients to be processed preferentially, and the overall efficiency of medical services is improved.

The invention discloses a data sorting method and a hardware accelerator, and the method comprises the steps: storing a plurality of pieces of target data into respective corresponding registers based on the sorting order of the registers; first sorting operation is carried out on the target data in the registers, specifically, from the first register with the first serial number, the target data in the two adjacent registers are compared in sequence, the target data with the large numerical value are stored in the register with the front or rear sorting in the two registers participating in comparison, and the target data with the large numerical value are stored in the register with the front or rear sorting in the two registers participating in comparison; storing the target data with smaller numerical values into the register which is sequenced at the rear or the front in the two registers participating in comparison; and performing a sub-operation in the intermediate sorting operation on the target data in the register, the sub-operation including a second sorting operation and a third sorting operation. According to the data sorting method, the sorting efficiency of the target data is improved, and the time complexity in the sorting process is reduced.