62 results about "Memristor circuits" patented technology

The invention relates to a switchable chaotic analog circuit based on a Chua chaotic circuit system. The switchable chaotic signal source by a memristor circuit and a nonlinear circuit comprises a Chua chaotic circuit post-stage switchable-mode main circuit which is composed of an integrating circuit, a control switch circuit (S) arranged at the post stage of the integrating circuit, an absolute value function circuit (H(.)) disposed at the post stage of the control switch circuit (S), a first multiplying circuit (M1) mounted at the post stage of the absolute value function circuit (H(.)) and a negative resistance circuit arranged at the post stage of the first multiplying circuit (M1). The chaotic analog circuit has characteristics of simple circuit structure and strong implementability. In addition, switching of chaotic signals can be realized by the memristor circuit and the nonlinear circuit. Meanwhile, chaotic systems capable of generating two types of different charotic attractors and complex chaotic scrolls both show complex dynamic characteristics and become a novel chaotic signal source.

The invention discloses a fourth-order local active memristor circuit model. The circuit model comprises an integrated operational amplifier U1, an integrated operational amplifier U2 and multipliersU3, U4, U5, U6. The integrated operational amplifier U1 and the multiplier U6 are respectively connected with the input end, i.e. the voltage and current test end of a local active memristor. The integrated operational amplifier U1 is used for implementing integration operation, summation operation and inversion operation and returning the output signal to the multiplier U3 so as to finally obtainthe state variable for controlling the memory value. The integrated operational amplifier U2 is used for implementing the inversion operation and addition operation so as to obtain the required memory control function. The multiplier U6 multiplies the memory control function and the input voltage so as to obtain the final memristor current. The model is used for simulating the volt-ampere characteristics of the local active memristor and replacing the actual local active memristor for experiment, application and research.

The invention discloses a read-write circuit and a read-write method of a memristor. The read-write circuit mainly comprises a read circuit and a write circuit. The write circuit comprises: a first voltage follower circuit and a first voltage selector electrically connected with the memristor storage array. The read-write circuit further comprises a second voltage follower circuit and a second voltage selector which are electrically connected with the memristor storage array. Voltage stable following during bipolar writing is selected through the selector. Meanwhile, the reading circuit is provided with a variable resistor to select an access mode. The actual read-out voltage and the output voltage passing through the reference resistor under the same read-out voltage are input into a differential amplifier to obtain read-out data. According to the read-write circuit and the read-write method, the read-write circuit is simplified, high-speed stable read-write voltage can be provided, random fluctuation of the memristor is considered in the design of the read-out circuit, the stability of the memristor circuit is improved, and the read circuit is also suitable for binary and multi-value memristors.

The invention discloses a quadratic curve meminductor equivalent analog circuit, belongs to the technical field of circuit design, and designs an analog equivalent circuit capable of realizing volt-ampere characteristics of a meminductor. The volt-ampere characteristic of the meminductor is realized by utilizing an analog circuit; specifically, a quadratic curve meminductor volt-ampere characteristic is realized. An integrated operational circuit is used for achieving the corresponding operation in the characteristics of a meminductor, the analog circuit comprises seven operational amplifiersand a multiplier, the integrated operational amplifier is mainly used for achieving voltage following, inverting integration and inverting proportional operation, and the multiplier is used for achieving the product of two input signals. The memristor circuit is simple in structure, can replace an actual meminductor to realize circuit design, experiment and application related to the meminductor under the condition that a nano-scale single isolated memristor device cannot be obtained at present and in the future, and has the important significance for characteristic and application research ofthe meminductor.

The invention discloses an arc tangent trigonometric function voltage-controlled memristor circuit model. An integrated operational amplifier U1 is connected with an input end, namely a voltage and current test end of a memristor; the integrated operational amplifier U1 is used for realizing inverse amplification operation and integral operation, outputting a signal after integral operation and finally solving a state variable for controlling a memristive value, and the integrated operational amplifier U2 is used for realizing additive operation, inverse amplification operation and division operation; the multiplier U3 realizes derivation operation and inverse amplification operation of the signal; the integrated operational amplifier U4 is used for realizing integral operation; the multipliers U5 and U6 are used for realizing multiplication; and the multiplier U7 multiplies the control signal by an input voltage signal to obtain the final memristor point flow. The device is used for simulating volt-ampere characteristics of the memristor and replacing an actual memristor for experiment, application and research.

The invention relates to a band-pass filter based on a memristor. The technical scheme is showed as that the filter comprises a control module (1), a low-pass filter module (3) and a high-pass filter module (6), wherein the low-pass filter module (3) is formed by connection of the output end VLP1 of a first memristor circuit (2) and the input end VIN2 of a first memcapacitor equivalent circuit (4); and the high-pass filter module (6) is formed by connection of the output end VHP1 of a second memcapacitor equivalent circuit (5) and the input end VIN4 of a second memristor circuit (7). The input end of the first memristor circuit (2), the input end of the first memcapacitor equivalent circuit (4), the input end of the second memcapacitor equivalent circuit (5) and the input end of the second memristor circuit (7) are correspondingly connected with the output ends of the control module (1). The input end VIN1 of the first memristor circuit (2) is externally connected with an input signal of a filter; and the output end of the second memristor circuit (7) is externally connected with an output signal of the filter. The band-pass filter provided by the invention has the characteristics of simplicity in structure, highness in precision, easiness to control and the like.

The invention discloses an extremely-simple floating ground charge-controlled memristor circuit simulation model. The model comprises a port a, a port b, a voltage-controlled resistor UR, a resistor R, a current-controlled voltage source IU and a voltage integrator A; the voltage-controlled resistor UR comprises a voltage control end uc and a controlled resistor Ru; the resistance value of the controlled resistor Ru in the voltage-controlled resistor UR is controlled by the voltage value of the voltage control end uc; the current-controlled voltage source IU comprises a current control end i and a voltage source output end ui; the voltage value of the voltage source output end ui in the current-controlled voltage source IU is controlled by the current value of the current control end i; and the voltage integrator A comprises a voltage input end ui and a voltage output end uc. According to the floating ground charge-controlled memristor circuit simulation model provided by the invention, electrical characteristics of the ports a and b are equivalent to the characteristics of the ports A and B of a memristor M; only four elements existing in simulation software need to be used; and besides, the floating ground charge-controlled memristor circuit simulation model is a two-port model, thus the complexity and the number of components of the existing charge-controlled memristor circuit simulation model are further reduced, and the model has the advantages that the grounding of one end is not required, the change range of the memristance is flexible, and the working voltage rangeis wide.

The invention provides a chaotic oscillator based on multiple memristors. The oscillator comprises an operational amplifier U1, capacitors C1, C2 and C3, two positive and negative diodes D1 and D2, aresistor R, an inductor L1, two charge control memristors M1 (q1) and M2 (q2) and a magnetic control memristor W (xi), wherein one end of the magnetic control memristor W (xi) is connected with the positive phase input end of the operational amplifier; wherein one ends of the two charge-controlled memristors are connected with the inverting input end of the operational amplifier, the positive electrode end of the capacitor C1 is connected with the inverting input end of the operational amplifier, the positive electrode end of the capacitor C2 is connected with the positive electrode end of thecapacitor C1, the capacitor C3 and the inductor L1 are connected in parallel and simultaneously connected with one ends of the two positive and negative diodes D1 and D2, and the other end is grounded. The problems that a memristor circuit model in the prior art is too simple in structure, circuit elements involved in a circuit are relatively few, a certain deviation exists between a large numberof single memristor oscillators and the requirement of an ideal commercial memristor circuit model, and the design structure is relatively unreasonable are solved.

Memristor-based nano-crossbar computing is a revolutionary computing paradigm that does away with the traditional Von Neumann architectural separation of memory and computation units. The computation of Boolean formulas using memristor circuits has been a subject of several recent investigations. Crossbar computing, in general, has also been a topic of active interest, but sneak paths have posed a hurdle in the design of pervasive general-purpose crossbar computing paradigms. Various embodiments are disclosed which demonstrate that sneak paths in nano-crossbar computing can be exploited to design a Boolean-formula evaluation strategy. Such nano-crossbar designs are also an effective approach for synthesizing high performance customized arithmetic and logic circuits.

The invention relates to a memristor chaotic circuit based on the Chua's circuit, which is characterized in that a first operational amplifier A1, a second operational amplifier A2 and a third operational amplifier A3 constitute a linear phase-reversing integrator, a fourth operational amplifier A4 constitutes a linear phase-reversing amplifier, and the output ends of the first operational amplifier A1, the fourth operational amplifier A4, the third operational amplifier A3 and a sixth operational amplifier A6 are respectively a chaotic signal output end X1, a chaotic signal output end X2, a chaotic signal output end X3 and a chaotic signal output end U; a phase-reversing integrator A1 is connected with a phase-reversing integrator A2, a phase-reversing integrator A6 and a second analog multiplier M2; the phase-reversing integrator A2 is connected with the first operational amplifier A2 and the fourth operational amplifier A4; the phase-reversing integrator A3 is connected with the phase-reversing integrator A2; the A1, A2, A3 and A4 constitute a third-order dynamic integrator circuit; and the A5, A6, M1 and M2 constitute a memristor circuit. Disclosed by the invention is a chaoticcircuit which can output various waveforms, phase diagrams and chaotic evolution curves of a memristor chaotic circuit based on the Chua's circuit and can form a chaotic secure communication system.

The invention discloses a floating geomagnetically controlled memristor simulator based on a transconductance operational amplifier. comprising a port a, a port b, a transconductance operational amplifier U1, a transconductance operational amplifier U2, a current feedback operational amplifier U3, a voltage feedback operational amplifier U4, a capacitor C1, a resistor R1, a resistor R2, a resistorR3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10 and a resistor R11.The model of the transconductance operational amplifier U1 is LM13600,and the model of the transconductance operational amplifier U2 is LM13600. The electrical characteristics of the floating geomagnetically controlled memristor simulator port a and the floating geomagnetically controlled memristor simulator port b are equivalent to the port characteristics of a magnetically controlled memristor, one end is not required to be grounded, and the floating geomagnetically controlled memristor simulator port a and the floating geomagnetically controlled memristor simulator port b can be widely applied to design and testing of memristor circuits (memristor chaotic circuits, memristor oscillating circuits and the like).

The invention discloses a novel logarithmic absolute value local active memristor circuit model. An integrated operational amplifier U1 and a multiplier U8 are respectively connected with an input end; the integrated operational amplifier U1 is used for realizing inverse addition operation and integral operation and returning an output signal to the multiplier U5; the integrated operational amplifier U2 is used for realizing inverse amplification operation and returning the output signal to the integrated operational amplifier U1, and finally obtaining a state variable for controlling a memristor value. The integrated operational amplifier U3 is used for realizing inverse addition operation, inverse amplification operation and absolute value operation; the integrated operational amplifier U4 is used for realizing logarithm operation and inverse amplification operation to obtain a required memristor control function, and the multiplier U8 is used for multiplying the memristor control function by an input voltage quantity to obtain a final memristor current quantity. The novel logarithmic absolute value local active memristor circuit model is used for simulating the volt-ampere characteristic of the local active memristor and replacing an actual local active memristor to carry out experiment, application and research.