7results about How to "Sure flexible" patented technology

The invention discloses an intelligent control method and device, electronic equipment and a readable storage medium, and belongs to the technical field of intelligent control. Under the condition that the gesture instruction does not conflict with the voice instruction, performing multi-dimensional normalization on the gesture feature vector to obtain a to-be-fused gesture vector; performing normalization processing on the voice feature vector based on context semantic perception to obtain a to-be-fused voice vector; fusing the to-be-fused gesture vector and the to-be-fused voice vector to obtain a fusion vector, and determining a fusion instruction corresponding to the fusion vector as a target execution instruction; and under the condition that the gesture instruction conflicts with the voice instruction, selecting a target execution instruction according to a first confidence coefficient corresponding to the gesture instruction and a second confidence coefficient corresponding to the voice instruction. The self-adaptive normalization strategy is designed for different modal data, the data fusion accuracy is improved, meanwhile, the gesture and voice instruction conflict can be intelligently and flexibly processed, and the accuracy of determining the real intention of the user is improved.

The embodiment of the invention discloses a process processing method and device and electronic equipment. The method comprises the following steps: acquiring a memory occupation condition of a process; if it is determined that the process is the process to be subjected to memory release detection based on the occupancy condition and the process meets a memory release detection condition, memory release operation is conducted on the process, and the memory release detection condition is determined based on the occupancy condition. In this way, when it is determined that the process needs to be subjected to memory release detection according to the memory occupation condition of the process, the memory release detection condition used in the detection process can be determined according to the current occupation condition, and therefore whether memory release operation is conducted on the process or not can be determined more flexibly; and thus, the process processing flexibility is improved.

The invention relates to the technical field of integrated circuits, and provides a chip programmable power domain system and a chip programmable power domain method, through collaborative design of a new programmable power domain system structure, a configuration carrier is converted from physical level / logic signal control to power network physical connection control, a PMU is directly controlled to carry out physical on-off on a power domain, and the power domain can be directly switched on and off. A cooperative locking mechanism of an OTP fuse and a safety arbiter is introduced, so that real zero-power-consumption closing and permanent locking are realized; a fuse array is divided into two independent functional domains, namely a configuration data area and a locking status bit, and a state judgment and access control logic of a security arbiter is embedded in a reading process, so that separated management and control of configuration permission and configuration storage are realized; and a general application layer interface is used as a post-configuration channel to realize a high-level security protocol, so that the security and the mass production convenience are improved, and the final function of the chip can be flexibly and reliably determined with low power consumption in the later period of production.

The application provides an energy management method, an electronic device and a vehicle, and belongs to the technical field of energy management of vehicles. By adopting the technical scheme provided in the application, the initial equivalent factor is determined through a target driving condition, a working mode and battery power, the segmented target penalty function is determined through current power, target power and power parameters, and then the target equivalent factor is determined through the initial equivalent factor and the target penalty function. The initial equivalent factor can be flexibly determined in combination with information such as the current driving condition of the vehicle and the working mode, meanwhile, the final target equivalent factor is obtained by correcting the initial equivalent factor through the target penalty function. Compared with the fixed equivalent factor, the real-time correction of the determined target equivalent factor is more suitable for the current driving demand of the vehicle. The fuel economy of the vehicle is improved, the possibility of the system deviating from the optimal solution is reduced, and the accuracy of energy management is improved.

This application provides a logic synthesis test point insertion method and related equipment based on intermediate representation, relating to the field of testability chip technology. By performing test point analysis and insertion during the intermediate representation stage of the circuit, and employing a process-independent and logically complete intermediate representation form, this method can flexibly determine the test point location without relying on specific process library features. Furthermore, it leverages the convenience of logic transformation in the intermediate representation form, providing ample space for subsequent structural optimization. This application treats the intermediate representation circuit containing test points as a unified whole for timing and area-driven process mapping, enabling the search for the optimal cell matching scheme globally. This naturally optimizes the test point structure while generating the gate-level netlist, ultimately achieving significant improvement in circuit testability while effectively controlling area overhead and ensuring the stability of timing performance.

This application relates to video encoding and decoding, and specifically to tools and techniques for using and providing supplemental enhancement information in bitstreams. Among other things, the detailed description presents innovations for bitstreams having supplemental enhancement information (SEI). In particular embodiments, the SEI message includes picture source data (e.g., data indicating whether the associated picture is a progressive scan picture or an interlaced scan picture and / or data indicating whether the associated picture is a duplicate picture). The SEI message can also express a confidence level of the encoder's relative confidence in the accuracy of this picture source data. A decoder can use the confidence level indication to determine whether the decoder should separately identify the picture as progressive or interlaced and / or a duplicate picture or honor the picture source scanning information in the SEI as it is.

This disclosure relates to a device calibration method, apparatus, storage medium, electronic device, and program product, belonging to the field of semiconductor device technology. The method includes: determining a first channel parameter corresponding to a target device; determining a target doping dose corresponding to the target device based on the first channel parameter and an initial doping dose; and implanting dopant ions into a target doped region corresponding to the target device according to the target doping dose to calibrate the IV characteristics of the target device. Thus, during the calibration process, the influence of the first channel parameter of the target device on the optimal doping dose of the target device is considered, and the target doping dose, i.e., the optimal doping dose, of the target device is determined together with the first channel parameter and the initial doping dose. This allows for flexible determination of the target doping dose for different target devices, effectively ensuring the accuracy and flexibility of device calibration.