38results about How to "Improve development and debugging efficiency" patented technology

The invention discloses a double-interface smart card chip simulator, comprising a simulated chip, a field intensity detection module and integrated development environment software installed in a user computer. The integrated development environment software sets a minimum carrier field intensity value in the field intensity detection module through a debugging interface channel. The field intensity detection module detects whether a non-contact carrier exists or not in real time, and detects the magnitude of carrier field intensity, if the detected carrier field intensity is greater than the minimum carrier field intensity value, a valid non-contact reset signal is sent to the simulated chip, and if the detected carrier field intensity is smaller than the minimum carrier field intensity value, an invalid non-contact reset signal is sent to the simulated chip. According to the simulator, the consistency between the double-interface smart card chip simulator and a product chip function can be ensured, and the development debugging efficiency of a user program can be improved.

The embodiment of the invention discloses a distributed debugging method, a system and a device. When a client developer needs to use a first terminal to call a target service, a target user identifier for providing the target service can be added to a server request sent to a gateway, and the gateway searches for the target user identifier in first started service information so as to obtain a to-be-confirmed user identifier matched with the target user identifier. And when the started service identifier corresponding to the to-be-confirmed user identifier is matched with the target service identifier, the fact that the server developer starts the target service by using the second terminal is indicated , the service request is sent to the second terminal corresponding to the to-be-confirmed user identifier, and debugged by using the service provided by the second terminal. In the debugging process, the first terminal and the second terminal do not need to access the public server, and other developers can continue to access the public server or use other first terminals to be paired with other second terminals for debugging, so that the development and debugging processes are executed in parallel, and the development and debugging efficiency is improved.

The invention discloses an FPGA remote debugging system and remote debugging method. The system comprises a debugging client running in a debugging host, a debugging server running in a target machine, and a database server used for storing target system information; the remote debugging of an FPGA is completed by the client and the server through a remote debugging communication protocol; the database server stores a target system information table; the debugging client is used for performing user interaction operation, displaying the information, sending a debugging request packet and receiving a debugging response packet; and the debugging server is used for acquiring the target system information, receiving the debugging request packet from the debugging client, performing command analysis on the debugging request packet, forming the debugging response packet and sending the debugging response packet back to the debugging client. By adopting the technical scheme, programming and debugging of hardware codes are carried out on an FPGA board-level system connected to a computer host through the internet; the remote debugging system and method is simple and easy to use; and the development and debugging efficiency can be improved.

The invention discloses an emulator, which comprises an emulation chip, and the emulation chip includes an emulation logic module, a register group and a mirror image register group; in user mode, the emulation logic module controls the content of the mirror image register group and the register The content of the group remains consistent in real time; after entering the monitoring mode from the user mode, the content of the mirror image register group controlled by the simulation logic module no longer changes, and the value therein is the value when exiting the user mode; after entering the user mode from the monitoring mode The emulation logic module controls the content of the register set to be rewritten into the content of the mirror register set, and at this time, the value in the register set is restored to the value when exiting the user mode. The invention can simplify the process of protecting the site and restoring the site, improves efficiency and reduces the probability of errors.

The invention provides a method and a device for setting up a Web front-end local development environment. The method includes: presetting a local proxy server; receiving a webpage access request sent by a client by the local proxy server, wherein the webpage access request contains information of a webpage resource file; judging whether a corresponding file exists in the local proxy server or not according to the information of the webpage resource file; if yes, extracting the corresponding file from the local proxy server; if not, issuing a request for obtaining the corresponding file to a content distribution network (CDN) server and receiving the corresponding file returned from the CDN server by the local proxy server; and when the corresponding file is multiple, combining prior to returning the obtained files by the local proxy server. By the method and the device, complexity of front-end code release online operations can be lowered, development efficiency can be improved, and risks for developing and modifying debug files can be lowered.

The invention discloses a processor chip simulator, comprising a simulation chip, a monitoring module, and integrated development environment software and interface software installed on a user computer. A processor state register and a PC ((Program Counter) record register are arranged in the simulation chip. The monitoring module is connected with the simulation chip through an access interface, is connected with the user computer through a debugging interface and carries out information transmission with the interface software. The interface software carries out information transmission with the integrated development environment software through a communication interface. If the interface software discovers that the simulation chip is in a low power consumption mode, content of the PC record register is read through the monitoring module. The information indicating that the simulation chip is in the low power consumption mode and the content of the PC record register are returned to the integrated development environment software. The integrated development environment software displays the fact that the simulation chip is currently in the lower power consumption state. According to the processor chip simulator, a user program can be developed and debugged conveniently and the development efficiency of the user program is improved.