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2results about How to "Reduce read" patented technology

A video clip level content management and control method and system

ActiveCN121792808BReduce CPU usageEliminate microstuttering
This invention relates to the field of multimedia video processing and playback control technology, specifically a video segment-level content management and control method and system, comprising: a time-series discrete mapping step: obtaining a server-side rule set and mapping it to a time-series state index structure with video durations divided into discrete-time graticles; an asynchronous look-ahead detection step: calculating the look-ahead time based on the current playback time using an independent asynchronous thread and reading the corresponding graticle data from the bitmap; an instruction generation and caching step: generating instruction objects based on graticle control identifiers using preprocessing logic and pushing them sequentially into an instruction circular queue; and a frame-level synchronous application step: checking the queue during main playback thread rendering, and applying the instruction if the current time matches the instruction trigger time. This invention reduces playback CPU usage, eliminates micro-stuttering caused by main thread blocking, and ensures accurate triggering of control logic at the frame level.
Owner:BEIJING YIHE BOJIA EDUCATION TECH CO LTD

Data processing apparatus, data processing method and related devices

ActiveCN116362304Bwrite lessreduce readComputer hardwareDatasheet
The application provides a data processing device, a data processing method and related devices, comprising a neural network processor, first, according to the channel number n of the first data, the first data is divided into n first sub-data, the first data represents data to be stored, n is a positive integer less than or equal to M / 2; each first sub-data is written into a circular cache space composed of INT(M / n) ring cache space groups, and any one circular cache space is used for storing any one first sub-data. The area of the cache control circuit in the neural network processor can be reduced by a specific storage space architecture, and the power consumption of data writing and reading is reduced.
Owner:GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD