8 results about "Direct-access storage device" patented technology

Method (1000) for forming a ferroelectric direct access memory device, FeRAM device (200), wherein the method (1000) comprises: Forming a first layer stack (202A, 202B, 202C and 202D) and a second layer stack (202A, 202B, 202C and 202D) successively over a substrate (50, 101), wherein the first layer stack (202A, 202B, 202C and 202D) and the second layer stack (202A, 202B, 202C and 202D) each have a first dielectric layer (201) and an electrically conductive layer (203) formed over the first dielectric layer (201); Forming a second dielectric layer (201T) over the second layer stack (202A, 202B, 202C and 202D); Structuring the first layer stack (202A, 202B, 202C and 202D), the second layer stack (202A, 202B, 202C and 202D) and the second dielectric layer (201T), wherein a step-shaped region (231) is formed during structuring, wherein in the step-shaped region (231) the second layer stack (202A, 202B, 202C and 202D) extends beyond lateral dimensions of the second dielectric layer (201T) and the first layer stack (202A, 202B, 202C and 202D) extends beyond lateral dimensions of the second layer stack (202A, 202B, 202C and 202D), wherein after structuring the electrically conductive layers of the first and second layer stacks (202A, 202B, 202C and 202D) form a first word line or a second word line; Formation of a first dielectric material (205) over the second dielectric layer (201T) and over the layer stacks (202A, 202B, 202C and 202D); Performing a planarization process such that the upper surface of the first dielectric material (205) lies on a plane with the upper surface of the second dielectric layer (201T); After structuring, a trench (206, 232, 234) is formed, which extends through the first layer stack (202A, 202B, 202C and 202D), the second layer stack (202A, 202B, 202C and 202D) and the second dielectric layer (201T); Coating the side walls and bottom of the trench (206, 232, 234) with a ferroelectric material (213); Formation of a channel material (207) over the ferroelectric material (213); Filling the trench (206, 232, 234) by forming a second dielectric material (205, 208, 209) above the channel material (207); and Forming a source line and a bit line in the second dielectric material (205, 208, 209), wherein the source line and the bit line extend through the second dielectric layer (201T), the second layer stack (202A, 202B, 202C and 202D) and the first layer stack (202A, 202B, 202C and 202D).

Method for forming a ferroelectric direct access memory device, FeRAM device, wherein the method comprises: Forming a layer stack (202) over a substrate (50), wherein the layer stack (202) comprises alternating layers of a first dielectric material (201) and a word line material, WL material (203); Forming first trenches (206) extending vertically through the layer stack (202) from an upper surface of the layer stack (202) away from the substrate (50) to a lower surface of the layer stack (202) facing the substrate (50), Lining the undersides and side walls of the first trenches (206) with a ferroelectric material (205), Formation of a channel material (207) in the first trenches (206) over the ferroelectric material (205), Filling the first trenches (206) with a second dielectric material (213), after filling the first trenches (206), forming second trenches (212) extending vertically through the layer stack (202), with the second trenches (212) being nested with the first trenches (206), Lining the undersides and side walls of the second trenches (212) with the ferroelectric material (205), Formation of the channel material (207) in the second trenches (212) above the ferroelectric material (205), Filling the second trenches (212) with the second dielectric material (213), and after filling the second trenches (212), forming source lines, SLs (218S), and bit lines, BLs (218B), in the first trenches (206) and the second trenches (212), the SLs (218S) and BLs (218B) extending vertically through the layer stack (202), wherein the WL material (203) is an electrically conductive material and the channel material (207) is a semiconductor oxide, wherein the channel material (207) comprises indium tungsten oxide.

A computational storage system may include a computing circuit configured to execute an operation requested by a host, a storage device for storing data, and a switch configured to establish a connection among the host, the computing circuit and the storage device based on a topology for the host, the computing circuit and the storage device. The switch may establish the connections so that the host can directly access the computing circuit and the storage device when the topology is a first topology, and may establish the connections so that the host can directly access the computing circuit but the host cannot directly access the storage device when the topology is a second topology.

The invention discloses a GPU direct access-based Lustre client persistent cache performance optimization method and system, relates to the technical field of high-performance computing storage, and discloses a GPU direct access-based Lustre client persistent cache performance optimization method and system which directly access a local SSD (Solid State Disk) and optimize a metadata management mechanism through a GPU. The CPU is prevented from serving as the bottleneck of data transfer, the copy operation of redundant memory is reduced, the problem of performance limitation caused by the fact that the GPU cannot directly access the storage device in the prior art is effectively solved, data transmission delay can be reduced, the system throughput is improved, CPU resource consumption is reduced, and the parallel processing capacity of the GPU is fully exerted.

The application discloses a GPU direct access-based Lustre client persistent cache performance optimization method and system, relates to the high-performance computing storage technical field, and discloses the GPU direct access-based Lustre client persistent cache performance optimization method and system, which avoids the bottleneck of CPU as a data transfer station, reduces redundant memory copy operations, effectively solves the performance limitation problem caused by the fact that a GPU cannot directly access a storage device in the prior art, can reduce data transmission delay, improve system throughput, reduce CPU resource consumption, and fully exert the parallel processing capacity of the GPU.

An approach is disclosed that identifies an anomaly in a Volume Table of Contents Index (VTOC Index) that is associated with a Direct Access Storage Device (DASD) Volume Table of Contents (VTOC) that corresponds to a DASD. The approach operates to automatically correct the VTOC Index based on the identified anomaly.