51results about How to "Voltage difference" patented technology

A system including associated equipment for transmitting radio-frequency power line carrier signals on high voltage ac or dc transmission lines within a multi-conductor bundle, one path for which is provided by one or more conductors located at the center of the bundle, and the other by the remaining conductors connected in electrical parallel and arrayed in a generally circular pattern around the center. Insulated conductor spacers hold the conductors in their symmetrical configuration and insulate the center conductor, allowing it to serve as a radio frequency path similar to that in a conventional coaxial cable. The system provides low attention, low vulnerability to external noise and low radiation of the carrier signal while providing redundant channels—three for ac transmission lines and two for bipolar dc transmission lines.

A system for protecting an electronic device from mechanical intrusion attempt. An intrusion barrier able to detect mechanical intrusion by means of circuit traces which detect any change in the resistance characteristics of the electric circuit. These circuit traces function as a resistors and they are connected together to form a Wheatstone bridge. According to the present invention the logical lay-out of these connections is selected so that the voltage difference between two adjacent traces is minimized. In this way the current leakage effect is limited to the minimum.

Power is transmitted from a feeding coil L2 to a receiving coil L3 by magnetic resonance. A VCO 202 alternately turns ON / OFF switching transistors Q1 and Q2 to feed AC current to the feeding coil L2, whereby the AC power is fed from the feeding coil L2 to the receiving coil L3. An AC magnetic field generated by AC current IS flowing in the feeding coil L2 causes inductive current ISS to flow in a detection coil LSS. A phase detection circuit 150 compares the phase of AC voltage generated by the VCO 202 and phase of the inductive current ISS to detect the phase difference between voltage and current phases and generates phase difference indicating voltage indicating the magnitude of the phase difference. The reset circuit 102 forcibly reduces the phase difference indicating voltage when the phase difference indicating voltage exceeds a predetermined threshold.

A power reserve apparatus is disclosed. In one embodiment, the power reserve apparatus comprises a first module including a first set of battery cells and a first inter-cell balance adjustment unit configured to use passive balancing to reduce voltage variance among the first set of battery cells. The power reserve apparatus also comprises a second module including a second set of battery cells and a second inter-cell balance adjustment unit configured to use passive balancing to reduce voltage variance among the second set of battery cells. The power reserve apparatus further comprises an inter-module balance adjustment unit configured to use active balancing to reduce voltage variance among the first and second modules.

Disclosed is a semiconductor memory device. In the process for the memory cell to reading stored data by selecting specific word lines, word lines neighboring the selected word line are selected at the same time, or the two bit lines are connected at the same time to the input terminals of the sense amplifiers, thus increasing the difference in voltage between both the input terminals of the sense amplifiers. Therefore, the read margin is increased, the exactness of the read operation is increased, and reliability of the device is improved.

A battery pack capable of sufficiently exhibiting performance of each secondary battery constituting the battery pack and its producing method are provided. The battery pack producing method of the invention comprises an obtaining process for obtaining a charge amount voltage curve C during charging and a charge amount voltage curve D during discharging, a selecting process for selecting more than one of the used secondary batteries close to each other in curves C and D from a group of the used secondary batteries whose curves C and D have been obtained, and an assembling process for combining the selected used secondary batteries to constitute the battery pack.

A wind turbine pitch drive system comprises an electric grid for supplying electrical power, a motor for driving a pitch actuator, an electronic converter for controlling the motor and a back-up energy storage unit for supplying electrical power. The electronic converter comprises a DC-link capacitor bank. The system furthermore comprises a switching device for selectively connecting the DC-capacitor bank link to the back-up energy storage unit, and a frequency generator for controlling the switching device. Also disclosed is a method for protecting a component of the electronic converter.

A charge pump for use in a Phase Locked Loop / Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage.

A driving circuit for a capacitive load includes a driving signal generating unit that generates a driving signal for driving the capacitive load by using a pair of driving transistors. A power source voltage generating unit generates high-voltage and low-voltage power source voltages that are higher and lower, respectively, than the voltage of the driving signal and applies the voltages to collectors of the driving transistors. The power source voltage generating unit includes a pair of power source transistors and a capacitor. The low-voltage power source voltage is generated in an output side of the power-source transistor pair as a voltage that is in a voltage region lower than that of the driving signal and follows the driving signal. The high-voltage power source voltage is output from a high-voltage terminal of the capacitor, is in a voltage region higher than that of the driving signal, and follows the driving signal.

Method and arrangement for connecting an AC electric motor (M1, M2, . . . MN) to an AC electricity network (L) in a system which comprises a frequency converter (FC), with which the motor is started, and contactors (S11, S12, S21, S22, SN1, SN2), in which method the supply source is changed by means of the contactors from the frequency converter to a direct network supply, in which method the frequency converter is stopped before changing the supply source, and in which method in connection with changing the supply source the control of the contactors is started before stopping the frequency converter.

Method and arrangement for connecting an AC electric motor (M1, M2, . . . MN) to an AC electricity network (L) in a system which comprises a frequency converter (FC), with which the motor is started, and contactors (S11, S12, S21, S22, SN1, SN2), in which method the supply source is changed by means of the contactors from the frequency converter to a direct network supply, in which method the frequency converter is stopped before changing the supply source, and in which method in connection with changing the supply source the control of the contactors is started before stopping the frequency converter.

Power is transmitted from a feeding coil L2 to a receiving coil L3 by magnetic resonance. A VCO 202 alternately turns ON / OFF switching transistors Q1 and Q2 to feed AC current to the feeding coil L2, whereby the AC power is fed from the feeding coil L2 to the receiving coil L3. An AC magnetic field generated by AC current IS flowing in the feeding coil L2 causes inductive current ISS to flow in a detection coil LSS. A phase detection circuit 150 compares the phase of AC voltage generated by the VCO 202 and phase of the inductive current ISS to detect the phase difference between voltage and current phases and generates phase difference indicating voltage indicating the magnitude of the phase difference. The reset circuit 102 forcibly reduces the phase difference indicating voltage when the phase difference indicating voltage exceeds a predetermined threshold.

An ESD protection circuit is adapted for an integrated circuit with a first power source and a second power source. The ESD protection circuit comprises a first silicon controlled rectifier (SCR), a second silicon controlled rectifier, and a parasitic diode. The gate of the first silicon controlled rectifier is coupled to a first power source, and the gate of the second silicon controlled rectifier is also coupled to the first power source line.

Provided are an external power supply apparatus and a vehicle power supply method, whereby a power reception circuit of an electric vehicle can be projected or a configuration of the electric vehicle can be simplified. An external power supply apparatus is provided with a power supply unit, which is provided along a traveling path, and which supplies power to a power reception unit of an electric vehicle while the vehicle is traveling; and a voltage applying unit that applies a voltage to the power supply unit. The power supply unit includes a plurality of divided power supply units that are divided along the traveling path. The voltage applying unit applies the voltage such that the voltage to be applied to the divided power supply units becomes higher in the traveling direction of the electric vehicle.

According to an one aspect of the present invention, it is provided a non-volatile semiconductor memory device comprising: a first N type well; a plurality of P type non-volatile memory cells arranged in matrix and formed in the N type well; a plurality of sub-bit lines, each of the sub-bit lines being connected to drains of the P type non-volatile memory cells in a respective one of columns of the matrix; a first P type well; and a plurality of N type selection transistors, each of the selection transistors selectively connecting a respective one of sub-bit lines to a corresponding one of main bit lines.

A charge pump circuit and method for supplying power. The charge pump circuit includes a first circuit receiving at least one low voltage signal and generating an output voltage signal. The charge pump circuit also includes a second circuit receiving a clock signal and the output voltage signal. The second circuit sends a request signal based on a comparison of the output voltage signal with two reference voltage signals, where the two reference voltage signals are derived from two supply voltage signals having a substantially constant potential difference. The charge pump circuit further includes a high voltage generator receiving the request signal and sending the two supply voltage signals to the first circuit and the second circuit. The high voltage generator adjusts the voltage potentials of the two supply voltage signals such that the voltage potential of the output voltage signal falls between the voltage potentials of the two reference voltage signals.

A current-limited latch circuit is used within a nonvolatile memory integrated circuit for decoding, programming, erase, and other operations. In one implementation, there are a number of latches connected together in parallel between two power supply lines. A current mirroring scheme limits current supplied to the latch. This reduces a difference of the two supplies, positive voltage, ground, or negative voltages, during data changes. The circuit provides smaller device sizes and fast speeds when data changes in the latch, while also providing lower power consumption. The technique provides greater benefits as the voltage difference between the two power supplies is greater.

A current-limited latch circuit is used within a nonvolatile memory integrated circuit for decoding, programming, erase, and other operations. In one implementation, there are a number of latches connected together in parallel between two power supply lines. A current mirroring scheme limits current supplied to the latch. This reduces a difference of the two supplies, positive voltage, ground, or negative voltages, during data changes. The circuit provides smaller device sizes and fast speeds when data changes in the latch, while also providing lower power consumption. The technique provides greater benefits as the voltage difference between the two power supplies is greater.

The present invention provides a liquid crystal display device which can obtain a high image quality display by suppressing the fluctuation of a pixel voltage. Along a large number of drain lines which are driven in a time-division manner, a portion of gate line is extended and an additional capacitance is formed by an extending portion of the gate line which has fixed potential and the drain line.

A light emitting organic thin film including at least one compound represented by Formula (PQ-1) and at least one compound represented by Formula (BN-1).In Formula (PQ-1), each of Ra, Rb and Rc independently represents a hydrogen atom or an alkyl group, wherein any one of Ra, Rb and Rc represents a hydrogen atom and the remaining two represent an alkyl group. Each of R1 to R5 independently represents a hydrogen atom, an alkyl group, an aryl group, a fluorine atom or a cyano group. Each of Rx and Ry independently represents an alkyl group or a phenyl group. In Formula (BN-1), Ar1 represents an arylene group that may have a substituent Z. Ar2 represents a condensed hydrocarbyl group that may have a substituent Z. Each of R101 to R113 independently represents a phenyl group, or the like.

The correlated double sampling circuit includes a plurality of sampling circuits. Each of the sampling circuits samples each of a plurality of color signals which are sequentially output from a solid-state imaging device.

A pixel structure and its related driving method are proposed. The pixel structure comprises a first transistor, a second transistor, a liquid crystal capacitor, a first storage capacitor, and a second storage capacitor. The first transistor comprises a gate coupled to a first scan line, a source coupled to a data line, and a drain coupled to the first storage capacitor. The first transistor is used for conducting the data line and the first storage capacitor. The second transistor comprises a gate coupled to a second scan line, a source coupled to the first storage capacitor, and a drain coupled to the second storage capacitor. A first polarity voltage applied on the data line is stored into the first storage capacitor during a first time period which the first transistor is turned on. The first storage capacitor discharges due to a connection between the first capacitor and the second capacitor during a second time period which the second transistor is turned on. By using such driving method, the difference in voltage between the liquid crystal capacitor and a common voltage is reduced from charge sharing for improving a color washout effect of the LCD panel.

A liquid jet apparatus according to the present invention includes a drive circuit adapted to apply a drive signal to an actuator of a liquid jet head, and a power supply voltage control circuit adapted to control a power supply voltage to the drive signal to be a waveform voltage set previously based on a reference signal obtained from one of the drive signal and a signal in a generation stage of the drive signal.

A battery system having: a series unit in which battery units are connected in series; heat exchangers thermally coupled with the battery units and internally circulating the coolant; and an outer case in which the series units and the heat exchangers are accommodated. The battery unit has battery cells stacked together, a plus output terminal and a minus output terminal at both ends thereof. The battery unit disposed at an end of the plus output terminal side of the series unit is disposed at an inclined posture where the end of the plus output terminal side is away from the base plate of the outer case. The battery unit disposed at an end of the minus output terminal side of the series unit, is disposed at an inclined posture where the end of the minus output terminal side is away from the base plate of the outer case.

The present invention provides a liquid crystal display device which can obtain a high image quality display by suppressing the fluctuation of a pixel voltage. Along a large number of drain lines which are driven in a time-division manner, a portion of gate line is extended and an additional capacitance is formed by an extending portion of the gate line which has fixed potential and the drain line.

Disclosed are a display apparatus and a control method thereof, the display apparatus including: a display unit which includes a plurality of pixels with an organic light emitting diode (OLED); a power supply which supplies power to the display unit; an image processor which processes an image signal in accordance with the plurality of pixels; and a controller which divides the frame into a plurality of sub-frames, assigns bit weights to each of the divided sub-frames, and controls the power supply to supply a voltage which is adjusted by the assigned bit weights in accordance with the sub-frames to the display unit.

A battery apparatus with voltage-balancing control and a method controlling the same employ a voltage-balancing module, which balances voltage values of multiple series-connected batteries of the battery apparatus, and accumulates voltage difference values of each battery relative to reference voltage values to adjust an allowable discharge control parameter Duty for each battery. By virtue of a cycle for updating the Duty, voltage differences of the multiple series-connected batteries can be lowered below a preset value.

A system that dynamically refreshes the inputs of a differential receiver. During operation, while a differential transmitter is not transmitting data, the system applies substantially equal voltages to the outputs of the differential transmitter so that the differential voltage on the outputs of the differential transmitter is substantially zero. The system then refreshes the inputs of an associated differential receiver by applying substantially equal voltages to the inputs of the differential receiver so that the differential voltage on the inputs of the differential receiver is substantially zero. The differential transmitter is coupled to the differential receiver through a DC blocking mechanism, which prevents a DC voltage on the differential transmitter from reaching the differential receiver.

Disclosed are a display apparatus and a control method thereof, the display apparatus including: a display unit which includes a plurality of pixels with an organic light emitting diode (OLED); a power supply which supplies power to the display unit; an image processor which processes an image signal in accordance with the plurality of pixels; and a controller which divides the frame into a plurality of sub-frames, assigns bit weights to each of the divided sub-frames, and controls the power supply to supply a voltage which is adjusted by the assigned bit weights in accordance with the sub-frames to the display unit.