4 results about "Computer multitasking" patented technology

The invention provides a CGRA hardware architecture oriented to multi-task fusion execution and an operation method, belongs to the technical field of computer multi-task processing, and aims at solving the problems that in the multi-task fusion execution process, due to memory access missing of any task, execution of other tasks is hindered, calculation error propagation of the task is caused, and electric energy is wasted. Wherein the CGRA hardware architecture comprises a data storage module, a memory access monitor module and a plurality of Tiles; the data storage module is used for storing access hit / miss signals; the memory access monitor module is used for processing the memory access hit / miss signal to generate a global control signal Ctrl; a plurality of Tiles are used for generating a gated clock according to the global control signal Ctrl, and coordinated control is carried out on storage / recovery of a check point register TaskCkptReg, clock gating gClk activation and NOPs instruction coverage in each clock period, so that fusion execution of multiple tasks of the CGRA is realized.

The invention discloses a micro-nano satellite on-board computer multi-task synchronization method, which comprises the following steps that an on-board program calls a semaphore interface function in a task space, and after the interface function sends an inter-task communication message to a semaphore management task, a corresponding task enters a blocked state; and after receiving the message, the semaphore management task calls a processing function corresponding to the type of the message, the called processing function executes a corresponding semaphore processing operation, generates a response message according to a processing result, returns the response message to a corresponding semaphore interface function, and awakens the previously blocked on-board task at the same time. According to the method, many problems caused by multi-task synchronization in a satellite-borne computer operating system can be effectively solved.

The invention relates to the technical field of multi-task processing, and discloses a multi-task switching processing method and system for a notebook computer. The method comprises the following steps: acquiring an L1 data cache prefetch signal and a task switching failure signal of a multi-core processor in the notebook computer, and constructing a signal time sequence feature vector; performing time sequence conflict detection based on the signal time sequence feature vector to obtain a conflict probability matrix; performing fixed delay calibration based on the conflict probability matrix to obtain a time sequence compensation parameter combination; inputting the time sequence compensation parameter combination into a multi-core cache learning algorithm to perform cross-core collaborative scheduling decision to obtain a multi-core scheduling instruction sequence; and performing delay modulation on the L1 data cache prefetch signal and the task switching failure signal based on the multi-core scheduling instruction sequence to obtain a coordination signal output sequence. According to the invention, multi-core uniform time sequence coordination is realized, signal conflicts and resource competition are effectively avoided, and the cooperative work efficiency of the multi-core processor is improved.

This invention relates to the field of computer multitasking parallel computing technology, and in particular to a method and apparatus for performance prediction and collaborative optimization based on an autonomous heterogeneous platform. The method includes monitoring the resources of the running autonomous heterogeneous platform to obtain its real-time performance data, wherein computational inference tasks run on different computing units of the autonomous heterogeneous platform; fitting historical performance data within a preset time window to obtain performance peaks; predicting the performance of the real-time performance data to obtain predicted performance indicators; and reallocating the computational inference tasks to different computing units of the autonomous heterogeneous platform for execution based on the predicted performance indicators and the performance peaks. This invention can improve the resource utilization and execution efficiency of autonomous heterogeneous platforms under multitasking loads.