A processor arrangement, comprising a processor under observation, hereinafter PUO, having a
processing unit, which is configured to execute an application
program code stored in a memory and to provide application output data via an output interface; an
observation unit that is connected to the
processing unit and configured to monitor execution of the application
program code by the
processing unit and to provide execution information indicative of an execution pattern associated with the execution of the application
program code by the PUO; a cybersecurity-monitoring engine for observing the PUO, which is inaccessible by the PUO and comprises an observation input interface for receiving the execution information and an execution-monitoring unit, which is configured to perform a comparison between the received execution information and pre-generated execution pattern information and to detect an execution anomaly in the retrieved execution information, and to provide a monitoring output
signal indicative of the detected execution anomaly; a controllable latency-output-buffer unit, which is also inaccessible by the PUO and comprises a buffer memory and which receives at least a part of the output data of the PUO and the monitoring output
signal, and which is configured to temporarily store the received output data in the buffer memory for a pre-determined latency time span, output the temporarily stored output data from the buffer memory at the end of the latency-time span, if no monitoring output
signal indicative of the detected execution anomaly has been received, and to block at least a part of the output from the buffer memory as soon as the monitoring output signal indicative of the detected execution anomaly has been received.