17 results about "Sequential computation" patented technology

The invention discloses a lightweight rapid serialization method for high-throughput scientific data, which comprises the following steps of: 1) defining a uniform data model for each line station, including a common header field, a state specific field and a line station exclusive field; the common header field records the same information contained in each line station, the state specific field describes the data generation state of the line station, and the line station exclusive field describes the customization attribute contained in the data stream in different data generation states; 2) each line station processes the generated data according to the data model, generates a data stream model and serializes the data stream model, and a generator calculates the initial offset and the number of occupied bytes of each field in a binary stream according to the type, length and sequence of the fields; for a pre-distributed continuous buffer area, generating field write-in logic positioned according to offset, converting each field value into a byte stream according to the data type of the field value, and writing the byte stream into a corresponding position of the buffer area; and splicing the code of the binary data of each field to obtain serialized data.

A computing platform may receive matrix multiplication information indicating a plurality of matrix dimension sets for matrix multiplication. For each matrix dimension set, the computing platform may: 1) identify one or more multiplication variations, indicating different possible orders of operation for executing the corresponding multiplication, 2) perform memoization to identify, for each order of operation, a corresponding number of operations to complete the corresponding multiplication, 3) identify, based on the numbers of operations, a most efficient order of operation, and 4) store, in a lookup table, a relationship between the given matrix dimension set and the most efficient order of operation. The computing platform may identify matrix dimensions for a model configuration request, and identify, using the lookup table, a corresponding order of operations. The computing platform may iteratively train the generative AI model based on the order of operations, and deploy the generative AI model.

The invention relates to the technical field of computers, and provides a correctness verification method and device for a large-scale text sequence BWT, equipment and a medium. The method comprises the following steps of: blocking a character string X and a suffix number group of the character string X, and shrinking the character string X by recursively calling block induction sorting until a character in the shrunk character string X1 is unique; in the backtracking stage of the recursive 0 layer, calculating the sequence of S * type suffixes of X according to the suffix array of X1, and calculating the hash value of a descending S * type suffix sequence; according to the sequence of the S * type suffixes of the character string X, calculating L type and S type suffix preamble character sequences of each block and hash values of the L type and S type suffix preamble character sequences; calculating an L * type suffix sequence and the hash value of each block of the L type BWT sequence by adopting a small top heap; calculating the hash value of each block of the S * type suffix sequence and the S type BWT sequence by adopting a large top heap; and combining the two types of BWT sequences, and outputting a final verification result, so that the space-time overhead of BWT correctness verification is reduced.

This performs memory planning for code generation, determining the code for computation in the neural network. [Solution] The method provides sequential computation steps for a neural network, determines the size of the input data block and the size of the output data block for each computation step, and calculates memory planning conditions for each predetermined computation step in which the input data block in the memory area is at least partially contained within the output data block. The conditions indicate that the memory area allocated to the output data block of the computation step preceding the predetermined computation step is contained within the memory area of ​​the output data block of the predetermined computation step. The method also performs memory planning for each computation step, taking the calculated conditions into consideration, to set the memory areas of the respective input data block and output data block in main memory.

The application discloses a method and device for controlling triangle mesh rendering order, and belongs to the technical field of computer graphics and two-dimensional skeleton skinning animation. The method comprises the following steps: loading a triangle mesh model and obtaining an initial rendering order thereof; displaying the current rendering order in a preview area of a graphical user interface in a visualized manner in real time; receiving a sequence adjustment operation generated by a user based on linear, circular or manual interactive tools through a control area; responding to the operation to calculate and update the rendering order of each triangle in real time; and outputting the updated order to drive rendering or export an index file. The device comprises model loading, preview display, interactive receiving, sequence calculation and sequence output modules. The application realizes visualized and interactive adjustment of the rendering order, has the advantages of intuitiveness, flexibility, real-time and non-intrusiveness, and significantly improves the efficiency of graphical debugging and rendering effect optimization.

The application discloses a programming assistance method and device based on generative AI and a medium, relates to the technical field of intelligent programming, and comprises the following steps: sorting a state fragment set and establishing a unified scanning sequence, calculating the connection value between a function item state fragment and an interface item state fragment, determining the uniquely connected interface item state fragment and mode item state fragment, and then generating a target trajectory set, a constraint chain set, and corresponding slot set and reference fragment set; constructing a training sample and training a code generation model according to the target trajectory set, the constraint chain set, the slot set and the reference fragment set, generating a candidate patch set through the trained code generation model, performing consistency checking on each candidate patch and forming a consistency record set; and the application improves the pertinence and localizability of programming assistance by determining the uniquely connected interface item state fragment and mode item state fragment.

The embodiment of the invention provides a salary project calculation method and a related device, which are used for improving the convenience and accuracy of target salary project calculation. The method provided by the embodiment of the invention comprises the following steps: if the calculation of a target salary item is triggered, traversing the in-degree of each node in an abstract syntax tree to obtain a target node of which the in-degree is zero, and inserting the target node into a queue; for the target node, traversing a next-level child node of the target node in the abstract syntax tree, and subtracting one from the in-degree of the next-level child node to obtain the updated in-degree of the next-level child node; if the updated in-degree of the next-level child node is zero, inserting the next-level child node into the queue, determining the next-level child node as a target node, and returning to execute the step of traversing the next-level child node of the target node in the abstract syntax tree for the target node until each node is inserted into the queue, obtaining a plurality of nodes arranged according to a first sequence; and calculating the value of the target salary item according to the first sequence.

Multi-rule cooperative data cleaning system, storage medium and equipment relate to the field of computer data processing. The present application is to solve the problem that the existing data cleaning method is difficult to realize automatic data cleaning due to frequent logical conflicts and high error rate. The present application comprises: a rule storage unit for storing repair rules; a rule modification unit for modifying repair rules; a rule conflict detection unit for detecting whether the rules in the computing sequence conflict; a rule repair unit for repairing conflicting rules; a rule sequence calculation unit for calculating rule sequence; an error data detection unit for judging the cause of data error and recommending a repair method; an error data repair unit for repairing error data according to the recommended repair method and rule sequence; and a constraint modification unit for repairing data using the recommended repair method and sending the repair method to the rule library module. The present application is used for data cleaning.

The present invention relates to the field of artificial intelligence technology, and discloses a high-concurrency reasoning method and system for a large language model. The method comprises the following steps: utilizing an executor to calculate the size of a memory block and allocate memory space; utilizing a scheduler to convert a request sequence and place it into a waiting queue of the scheduler; the scheduler allocates a corresponding memory block to each request sequence until each request sequence is capable of performing the next reasoning; the scheduler calculates the memory requirements of the request sequences in the waiting queue according to priority order, and transfers the request sequences in the waiting queue to a running queue; and allocating the number of memory blocks for executing pre-filled reasoning or for executing decoding reasoning based on the number of pre-filled types and the number of decoded types of the request sequence. Therefore, the present invention adopts continuous batch processing, a dynamic space allocation mechanism, and a task scheduling framework, fully utilizing the parallel reasoning capability of continuous batch processing, improving the concurrency and throughput of large model reasoning, and overcoming the limitation of traditional continuous batch processing requiring pre-allocation of space.

The invention provides a cutting engineering process capability balancing method. The method comprises the following steps: obtaining each process capability, obtaining a process sequence, calculating a beat demand, determining a production scheduling rule, and constructing a production scheduling model based on a cuckoo search algorithm; wherein the construction of the production scheduling model based on the cuckoo search algorithm comprises the steps of initializing a population, calculating fitness, updating a solution through Levy flight, applying a production scheduling rule, executing crossover and mutation operations, performing constraint processing and performing iteration termination and output. The cutting engineering process capability balancing method is convenient to operate and intelligent, scientific and reasonable production scheduling is achieved, production is efficiently organized, the operation time of all the processes is equal to or close to the average beat multiple as much as possible, time waste caused by idle stations is reduced, and cutting engineering production scheduling is optimized.

The application discloses a dynamic SC-Flip decoding method based on key set flipping metric, comprising the following steps: performing SC decoding on root node LLR values received from a receiver, if the decoding sequence CRC check is successful, the decoding is ended, otherwise, the leaf node LLR values after decoding are saved; arranging the leaf node LLR values after decoding in descending order according to the key set flipping metric, obtaining T flipping indexes and a key set flipping metric set; sequentially finding the next unflipping index position from the T flipping index positions to re-decode, if the decoding sequence CRC check is successful or T times of decoding are completed, the decoding is ended, otherwise, the leaf node LLR values after decoding attempt are saved; updating the key set, calculating the key set flipping metric in the index order and inserting into the corresponding flipping set, and decoding again until the end. The method has the advantages that: compared with the classical dynamic SC-Flip decoding, the key set metric is used to simplify the calculation, the efficiency and stability are greatly improved, and the error code performance does not have obvious loss.

The present application relates to the technical field of computers. Disclosed is a multi-level reallocation mechanism-based GPGPU branch instruction scheduling method, comprising: a CPU sends instruction information to a GPGPU by using a PCIE; and the GPGPU performs multi-level reallocation scheduling processing on the instruction information. The multi-level reallocation scheduling processing comprises: a first-level general instruction execution unit / branch preprocessing unit determining the instruction information, if the instruction information is a non-conditional branch instruction, performing sequential computing execution, and if the instruction is a conditional branch instruction, pre-computing branch-instruction instruction blocks corresponding to warps / threads and sending same to a second-level branch scheduling unit; and the second-level branch scheduling unit reallocating corresponding thread execution statements according to a corresponding relationship between the received warps / threads and the branch-instruction instruction blocks. The present disclosure ensures the high concurrency of GPGPUs in processing branch instructions.

The application provides a data processing method, system, device and storage medium, relates to the technical field of data processing, and comprises the following steps: receiving a plurality of task creation requests sent by a business system, creating a plurality of business tasks; generating a first processing order of the plurality of business tasks in combination with the processing priorities and the association indexes of the business tasks; adjusting the first processing order according to the resource occupation amounts of the business tasks, and generating a second processing order; calculating delay risk indexes of the business tasks, adjusting the second processing order according to the delay risk indexes, and generating a target processing order; the delay risk index is used for representing the degree of influence of the processing delay of each business task on the business; and the plurality of business tasks are processed in the target processing order through a preset global task listener. The application has the technical effect that the scheduling efficiency in a complex business scenario is improved, and therefore the overall performance of the system is improved.

A parsing unit parses database calls from a first list of programs to generate a second list of programs specifying tables that are read or written by each program from the first list. A control unit determines, from the second list of programs, if any first programs do not read data written by other programs from the second list of programs. The control unit inserts the first programs at a beginning of a first table. Next, the control unit determines, if any programs still in the second list of programs only read data written by programs in the first table. These programs are inserted in the first table after the first programs. After this step has been performed multiple times, any programs remaining in the second list of programs are inserted at the end of the first table. Finally, programs from the first table are executed in order.

The invention relates to a complex formula analysis and calculation method and system, and the method comprises the steps: decomposing an input formula character string into marks, forming a mark sequence, and enabling each mark to represent a basic element in a formula; converting the mark sequence into an abstract syntax tree for representing the structure and priority relationship of the formula; constructing a grammar structure of a tree structure representation formula; extracting a dependency relationship between a formula and a variable from the abstract syntax tree; constructing a dependency graph according to the extracted dependency relationship; performing topological sorting on the dependency graph to determine a formula calculation sequence; according to a topological sorting result, calculating the value of each formula according to a correct sequence; the method is high in calculation efficiency, good in accuracy, high in cyclic dependence processing capability and good in expansibility.

An objective of the present invention is to provide a technology with which it is possible to manage the progress of a plurality of evaluations related to production recipe development while considering the evaluation progress degree thereof.　One progress management system according to the present invention is characterized in that a progress management application executes: a step in which an evaluation progress degree, which represents the progress degree for each evaluation relative to all evaluations, is calculated on the basis of an evaluation end time, which is the time at which all evaluations have ended, or on the basis of an application usage order corresponding to the content of each evaluation; a step in which a first specification achievement rate is calculated using the results of each evaluation; and a step in which the state of an evaluation is determined on the basis of the evaluation progress degree and a second specification achievement rate calculated using the first specification achievement rate, wherein the first specification achievement rate is the achievement rate for each evaluation result relative to a processing result specification, and the second specification achievement rate is the specification achievement rate for all evaluations.

The application relates to the technical field of computers, and provides a correctness verification method, device and equipment of a large text sequence BWT and a medium. The method comprises the following steps: blocking a character string X and a suffix array thereof, recursively calling block induction sorting to contract the character string X until the characters in the contracted character string X1 are unique; in the backtracking stage of the recursion 0 layer, the order of S* type suffixes of the character string X is calculated according to the suffix array of X1, and the hash value of the descending S* type suffix sequence is calculated; according to the order of the S* type suffixes of the character string X, the L type and S type suffix predecessor character sequence and the hash value thereof of each block are calculated; the L* type suffix order and the hash value of each block of the L type BWT sequence are calculated by using a small top heap; the S* type suffix sequence and the hash value of each block of the S type BWT sequence are calculated by using a large top heap; and the two types of BWT sequences are combined, and the final verification result is output, so that the time and space overheads of BWT correctness verification are reduced.