The application discloses an instruction tamper-proofing device for a traffic information board
system, relates to the field of traffic
information security, and solves the three technical problems of key clonable risk, high
algorithm dependence and poor environmental adaptability existing in traditional
encryption schemes. A tamper-proofing
system is constructed through a triple
synergy mechanism: unique unclonable physical characteristics are extracted based on a physically unclonable circuit, efficient integrity
verification is realized through a segmented cascading parity check circuit, and time stamps are accurately compared in combination with a temperature compensation
clock; and multi-dimensional features are fused and integrated, tamper identification is performed through feature comparison, irreversible hardware failure is formed to trigger tamper identification, and ultimate protection is formed. The device achieves a pure hardware
millisecond-level response, completely eliminates
software dependence, maintains a zero
false rejection rate in extreme environments, ensures the safety of the whole life cycle of the instruction through physical-level protection, and provides uncopyable security protection for the information board
system.