38 results about "Memory-mapped file" patented technology

The invention discloses a simulator detection method and system based on multi-dimensional feature fusion, and relates to the technical field of simulator detection, and the method comprises the steps: collecting the static feature information of a to-be-detected device; reading a memory mapping file of the equipment process in a preset time window, and obtaining a memory address allocation state at each moment to form a time sequence data set; further constructing an address space evolution sequence, and performing domain theory modeling to construct an address space domain; obtaining an address evolution function through a function construction algorithm; generating a regular mark through a natural transformation detection algorithm; performing topological structure analysis and coherence calculation on the address space category to generate address space complexity features; static feature information, regular marks and address space complexity features are integrated through a multi-layer fusion strategy, and simulator detection results are screened, judged and output layer by layer. According to the method, through a complementary collaborative system of static verification, dynamic rules and topology complexity, the anti-avoidance capability and robustness of detection are improved.

The invention discloses an audio test data processing method, system and device based on zero-copy NIO and a dynamic sliding window, and the method comprises the following steps: S1, building a memory mapping file channel, and directly mapping an audio file to a process address space; s2, constructing a double-buffer processing pipeline, and realizing asynchronous decoupling of a collection thread and a calculation thread by adopting a producer-consumer mode; and S3, a dynamic sliding window mechanism is adopted to maintain a real-time audio data interval, and the window size is dynamically adjusted according to a television CPU load. According to the technical scheme of the invention, the problems of high memory occupation, high detection delay and low cross-application data reading efficiency existing in audio testing of a television system in a multi-application concurrent scene are solved.

The invention relates to a hybrid architecture dynamic cache synchronization method based on a high-concurrency scene, and belongs to the technical field of computer Web application development. According to the method, a C + + dynamic link library is loaded when a JavaWeb application is started, and a cross-process cache storage space is constructed by utilizing a shared memory mechanism, so that data sharing among multiple instances is realized. And data interaction between Java and a C + + layer is completed by adopting a JNI interface, so that the Java garbage collection pressure is effectively reduced. Data consistency is guaranteed through an exclusive lock and read-write lock optimization mechanism, cross-instance update notification is realized in combination with event driving or message queues, and transaction type batch update is supported to ensure operation atomicity. A memory mapping file and an efficient data structure are innovatively adopted, the access efficiency is improved and the data copy overhead is reduced by combining a pre-allocation memory pool technology, the system throughput and the response speed are remarkably improved, the performance loss caused by memory fragments and lock competition is reduced, and the method is suitable for mainstream JavaWeb environments such as Spring frames and Tomcat servers.

The invention belongs to the technical field of artificial intelligence and financial science and technology, and relates to a data processing method and device, computer equipment and a storage medium, and the method comprises the steps: obtaining a to-be-processed data file, each line of data in the data file comprising a plurality of fields, and each field being isolated by a specific separator; reading the data file in parallel by adopting a memory mapping file mode, segmenting the data file into a plurality of data blocks, and setting a corresponding thread for each data block for reading; positioning the starting position and the ending position of each key field in each row of read data based on a specific separator, and acquiring the key fields by adopting an interception mode; performing hash value calculation on the key field according to a preset hash function, and storing the calculated hash value into a predefined open addressing hash table; and performing statistics on each table item in the open addressing hash table to obtain a data statistics result of the data file. The processing efficiency of the big data file can be improved.

The invention discloses a simulation method, system and device of an automobile thermal management system and a storage medium. In the scheme, a one-dimensional system simulation model of a target automobile thermal management system and a three-dimensional flow field simulation model of a target component are constructed. Running the one-dimensional model to obtain system-level parameters, writing the system-level parameters into the memory mapping file and generating a first flag file; after the first flag file is detected, the three-dimensional model runs based on the system-level parameters to obtain the flow field parameters, the flow field parameters are written into the memory mapping file, and a second flag file is generated. And after the second flag file is detected, the one-dimensional model obtains corrected system-level parameters based on the flow field parameters, the corrected system-level parameters are written into the memory mapping file, the first flag file is regenerated, and the steps are repeated. Real-time interaction of the parameters is realized through the memory mapping file, a closed-loop circulation mechanism is formed by means of the mark file, efficient, ordered and synchronous data interaction is ensured, instantaneous change of the system parameters can be captured in real time, and the accuracy and reliability of simulation of the automobile thermal management system are further improved.

The invention provides an image formation control method and device and a storage medium, and is applied to terminal equipment, and the method comprises the following steps: firstly, in response to a scanning trigger operation on a target file, creating a first memory mapping file; then, controlling the image forming equipment to execute scanning operation on the target file; and finally, receiving scanning data of the target file sent by the image forming equipment, and writing the scanning data into the first memory mapping file. According to the technical scheme, the scaling operation of the scanning data of the high-resolution and large-size image can be normally realized under the condition that the system memory of the terminal equipment is limited.

The invention relates to the technical field of dynamic instrumentation, in particular to a method and system for dynamically instrumenting a swan NEXT Native layer function. The method comprises the following steps: obtaining a process identifier of a target application process, and reading a corresponding memory mapping file to obtain a loading base address and a file path of a Native layer ELF shared object; an ELF file corresponding to the file path is read, and an index relation table of the target function symbol name of each item in the PLT section, the PLT item and the file offset of the PLT section is established; adding the loading base address and the file offset of the PLT section to calculate the initial address of the memory of the PLT section; and calculating the memory absolute address of the PLT entry of the target function according to the PLT entry of the to-be-intercepted function in the index relation table. According to the method, the index relationship between the symbol and the address is established by analyzing the memory mapping file and the ELF shared object file of the target process, and accurate function interception is realized at the PLT entry level.

This invention discloses an inter-process message distribution method, apparatus, and electronic device, relating to the field of communications. When a test environment process is detected to need message interaction with an ECU via a real adapter CAN channel, the test environment process is controlled to interact with the ECU via a first virtual adapter CAN channel. When a CAN tool process is detected to need to use the same real adapter CAN channel for message acquisition, the CAN tool process is controlled to read messages from a memory-mapped file via a second virtual adapter CAN channel. The first and second virtual adapter CAN channels share a memory-mapped file, and each virtual adapter CAN channel consists of a memory-mapped file and a message queue. When the test environment process and the CAN tool process acquire the same messages, they can share messages through the shared memory-mapped file, thereby improving the resource utilization of the adapter.

The invention provides a computer virtual memory animation resource layered loading method, and belongs to the technical field of animation resource layered loading. Animation resources are divided into a hotspot layer, a cache layer and a storage layer according to the use frequency by establishing a virtual memory space layered architecture; an animation resource priority evaluation matrix and a virtual memory animation optimization model based on a liquid neural network are constructed to analyze a resource access mode and generate a hierarchical loading strategy, so that a memory pool pre-allocation mechanism is realized, and a partner algorithm is adopted to manage a fixed-size memory block; a dynamic load balancing controller is constructed, model configuration is dynamically adjusted through an attention adjustment function, a layered loading process is executed, and a mobile compression algorithm and a memory mapping file technology are adopted for defragmentation, so that the problem that a large number of memory fragments are generated in a virtual memory space due to frequent loading and unloading of animation resources is solved; the memory utilization rate is reduced; and the subsequent large continuous memory allocation efficiency is influenced.

The invention discloses a zero-copy serialization method and device based on memory mapping, equipment and a medium, and relates to the field of data processing. In the method, a root object to be serialized is received, the root object and sub-objects are analyzed, and a field to be serialized is identified; constructing an object graph containing the reference relationship between the objects; in the object graph, recursively calculating the data size required for serializing the root object and the sub-object to obtain the total serialization size; according to the total serialization size, selecting and distributing a corresponding memory block from a preset layered memory pool, creating a memory mapping file corresponding to the memory block, and establishing a memory mapping buffer area based on the memory mapping file; traversing the object graph, and writing data of the root object and the sub-object into a memory mapping buffer area; the total length of the data is actually written into the memory mapping buffer area, and the total length of the data is written back into the reserved head area of the memory mapping buffer area. By implementing the technical scheme provided by the invention, the data serialization efficiency is improved.

The invention discloses a pulse description word TOA sorting method and system for a large file. The method specifically comprises the steps that firstly, a memory mapping module and a block storage module are created; then, a memory mapping module performs file block memory mapping, reads memory data, analyzes PDW data, and sorts the PDW data according to TOA from small to large; the block storage module receives the sorted PDW data, reads the PDW data sent by the memory mapping module, stores the first block data, compares the data between two adjacent blocks, sorts and merges the data, and finally stores the data; and repeating memory mapping and block storage until the file analysis, sorting and conversion are completed. According to the method, the memory mapping file is used for accessing the data file on the disk, so that the reading efficiency is improved, the storage efficiency is improved by using block storage, PDW data playback and signal sorting are facilitated, and the phenomenon that the PDW data is interrupted or cannot be played back during playback is avoided.

The application relates to the technical field of geographic information and data storage, and discloses a high-performance map storage updating method, which solves the problems in the background art, and comprises the following steps: dividing map data into a static layer and a dynamic layer, adopting column storage for the static layer, and adopting an in-memory mapping file for the dynamic layer; adopting Z-Order curve coding for the static layer data in combination with Delta compression, and using Snappy compression for the dynamic layer data and merging continuous frames based on time sequence similarity; adopting a multi-version concurrent control mechanism, associating a version chain with each data block, generating a new version for an updating operation, and appending the new version to the tail of the chain; and constructing a space-time joint index, and storing index partitions in distributed nodes. Through hierarchical storage, adaptive compression, distributed version control and joint indexing, the application effectively reduces storage overhead, improves incremental updating efficiency and space-time query performance, and is suitable for large-scale map data management scenes such as automatic driving and smart city.

The application provides a virtual machine linear memory expansion method and device, a storage medium and electronic equipment, and applies to the technical field of virtual machine memory. When an application is started, a software development kit is initialized, and a preset capacity of a memory linear allocator corresponding to a system version is obtained. A memory mapping file of the SDK is parsed, a memory region range is determined, and a local method is called to find a memory starting address. According to the address, the memory linear allocator is expanded, and a target buffer is allocated by using a memory mapping function. The application effectively solves the problem of virtual machine method number limitation by improving the memory capacity, ensures stable operation in all scenarios including startup and runtime dynamic loading, and reduces the situation of crash and installation failure.

The invention relates to the technical field of databases, and discloses a DuckDB-based lightweight non-instant disaster recovery OLAP database system, which comprises a server node, a webpage interface web ui and a business service client, a duckdb service is deployed on the server node, and the access of the duckdb service is packaged by adopting an asp.net core framework; the webpage interface web ui and the duckdb service are interacted with each other in a REST API (Application Program Interface) form; and the business service client side client service runs on the server node, and the business service client side client service writes data into the duckdb service by adopting a one-way memory mapping file (MMF). The method has an efficient OLAP processing capability, remarkably improves the processing performance of a large amount of time series data in writing, storing and reading links, is used for storing, querying and analyzing the large amount of time series data, and is particularly suitable for application scenes needing to process the large amount of time series data, such as the Internet of Things and industrial monitoring.

The invention provides a visual identification optimization method and system, electronic equipment and a storage medium, and the method comprises the steps: checking a current parameter of equipment, and determining a checked equipment parameter; performing data capture on the equipment with the adjusted equipment parameters to obtain original byte data; converting the original byte data to obtain a floating-point array; preprocessing the floating point type array to obtain preprocessed data; and writing the preprocessed data into an index position of the memory mapping file in a specified format by using a write pointer to obtain the written memory mapping file. According to the visual identification optimization method, initialization adjustment and original byte data conversion are carried out on the current parameters of the equipment, so that the accuracy and reliability of original byte data input are ensured, and a solid foundation is laid for subsequent image processing and analysis.

The application discloses a simulator detection method and system based on multi-dimensional feature fusion, and relates to the technical field of simulator detection.The method comprises the following steps: collecting static feature information of a to-be-detected device; reading a memory mapping file of a device process in a preset time window, obtaining memory address allocation states at each moment to form a time sequence data set; then, an address space evolution sequence is constructed, and an address space category is constructed through category theory modeling; an address evolution functor is obtained through a functor construction algorithm; regularity marks are generated through a natural transformation detection algorithm; topological structure analysis and homology calculation are performed on the address space category to generate address space complexity features; and the static feature information, the regularity marks and the address space complexity features are integrated through a multi-layer fusion strategy, and simulator detection results are output through layer-by-layer screening and judgment.The method improves the anti-avoidance capability and robustness of detection through a complementary and cooperative system of static verification, dynamic rules and topological complexity.

The invention provides a virtual machine linear memory expansion method and device, a storage medium and electronic equipment, and is applied to the technical field of virtual machine memories. When the application program is started, the software development kit is initialized, and the preset capacity of the memory linear distributor of the corresponding system version is obtained. And analyzing the memory mapping file of the SDK, determining a memory area range, and calling a local method to find a memory initial address. And according to the address, expanding a memory linear allocator, and allocating a target buffer area by utilizing a memory mapping function. According to the method, the memory capacity is improved, the problem of limitation of the number of virtual machine methods is effectively solved, stable operation under all scenes including dynamic loading during starting and operation is ensured, and therefore the situations of collapse and installation failures are reduced.

The application discloses an inference method and device of an industrial detection large model, equipment and a storage medium, relates to the field of edge computing, is applied to an edge inference end, and comprises the following steps: obtaining a target industrial detection large model, analyzing the target industrial detection large model by using a preset self-defined model loading tool to determine corresponding model weights; locking the basic weights to a target video memory partition corresponding to the target industrial detection large model by using a memory system of the edge inference end, and generating a memory mapping file corresponding to the target industrial detection large model based on the target video memory partition; obtaining to-be-inferred data corresponding to a target detection device, and calling the target industrial detection large model by using the memory mapping file to obtain an inference result corresponding to the to-be-inferred data based on a cross-modal feature pool corresponding to the target industrial detection large model. The application reduces the inference delay of the edge inference end.

The invention discloses a reasoning method, device and equipment of an industrial detection large model and a storage medium, relates to the field of edge computing, is applied to an edge reasoning end, and comprises the following steps: obtaining a target industrial detection large model, and analyzing the target industrial detection large model by using a preset self-defined model loading tool to determine a corresponding model weight; locking the basic weight to a target video memory partition corresponding to the target industrial detection large model by using a memory system of the edge inference end, and generating a memory mapping file corresponding to the target industrial detection large model based on the target video memory partition; and obtaining to-be-reasoned data corresponding to the target detection equipment, and calling the target industrial detection large model by using the memory mapping file to obtain a reasoning result corresponding to the to-be-reasoned data based on the cross-modal feature pool corresponding to the target industrial detection large model. The reasoning delay of the edge reasoning end is reduced.

This invention relates to the field of LSM tree technology, specifically to a method for implementing an LSM tree in memory, comprising the following steps: initializing CSPPTrie, allocating the space currently needed for each node through MemPool, and optimizing node concurrent access based on a multi-core CPU architecture. In this invention, by introducing memory management and data synchronization technologies, the system's write speed and data consistency are significantly improved. The use of copy-on-write technology effectively reduces lock contention in multi-core environments. By creating data copies in memory and updating operations, more efficient concurrent writes are achieved, reducing lock requirements, increasing processing speed, and significantly reducing operation conflicts. The implementation of token and delayed release mechanisms optimizes memory resource management, prevents memory leaks, and enhances the system's resource reclamation efficiency. This strategy ensures full utilization of system resources, making memory reclamation more efficient. The application of memory-mapped files makes the data persistence process more direct and efficient.

A method and system for node-based volumetric data generation and real-time rendering for DCC and Unreal Engine is disclosed. The method includes the following steps: creating and editing volumetric data based on the OpenVDB library in an external node-based editing tool; converting the edited OpenVDB volumetric data into a linearized NanoVDB buffer in real time; transferring the NanoVDB buffer from the external node-based editing tool to the UE5 plugin within the Unreal Engine via a memory-mapped file; receiving the NanoVDB buffer and uploading it to the structured buffer of the graphics processor; and performing real-time sampling and rendering of the volumetric data in the structured buffer within the Unreal Engine. The system includes a node-based volumetric editing module, a data format conversion module, a real-time data bridging module, and an engine-side rendering integration module. This invention directly utilizes UE5's native advanced rendering features such as Lumen and volumetric fog, solving the fundamental problem of poor compatibility in existing solutions.

The application provides a medical big data file export method, system and terminal based on a memory mapping file, wherein data in a processing process is written into a memory mapping file by using a memory mapping file technology, memory occupation is reduced, server lag is reduced, and throughput is improved. 2 In a data merging process, a scheme of first sorting and then traversing by using a pointer is adopted, the complexity of an algorithm is reduced from O(n) to O(n), export time consumption is greatly shortened, server load can be greatly reduced in cooperation with memory occupation reduction, and a large amount of data can be stably exported in a short time.

The embodiment of the invention provides a large file data extraction method and system. According to the method, firstly, a to-be-extracted file is directly mapped to a system memory space by utilizing a memory mapping technology to generate a memory mapping file, so that frequent data copying of a traditional file is avoided, and data access can be accelerated; then, based on the total size of a to-be-extracted file, data structure features and the current resource state of the system, the overall data extraction task is split into a plurality of subtasks, and a foundation is laid for subsequent parallel processing; according to the current load state of the system, corresponding threads are distributed to all the subtasks from a preset thread pool, data extraction operation of all the subtasks is executed in parallel through multiple threads, and the waiting time of task processing is shortened; and finally, integrating and outputting the data extraction results of all the sub-tasks to the target storage path, so that the data processing efficiency can be remarkably improved.

The present invention relates to molecular dynamics simulation, and particularly to a molecular dynamics simulation system. The CPU host side reads the system topology file and the system parameter file by using the memory mapping file technology, and saves the system topology file in the form of an array structure (Structure of Arrays, SoA). After receiving the data copied from the CPU host side, the DCU / GPU device side performs molecular simulation through a simulation channel, and the simulation channel is a std::vector of an ensemble base class, and this data records the identifier of each segment of ensemble operation. The sequence of execution of each ensemble in one step is the list builder, the velocity controller, the position controller, the particle force controller, the velocity controller, and the temperature / pressure controller. Compared with the prior art, the present invention has the advantage of high compatibility and can stably run on domestic systems, domestic CPUs, and domestic DCUs, while being compatible with non-domestic systems, CPUs, and GPUs.

An example operation includes at least one of loading an Artificial Intelligence (AI) model from a storage, receiving input data for the AI model, creating a multi-output Gradient Boosted Tree (GBT) based on the input data, creating a decision tree with a split objective guided by at least one output of the multi-output GBT, creating a Scalable AI (SAI) model comprising the AI model, the decision tree, and the multi-output GBT, reducing memory use of the SAI by at least one of: deallocating memory held by the SAI when no longer used, loading input data in shared memory for sharing between worker-processes of the AI model, or storing arrays in memory as memory mapped files, and reducing processor cycles use of the SAI by performing computations by at least one of: using 32-bit floating-point resolution, using 64-bit floating-point resolution, using a same floating-point resolution for all calculations, or using vector floating-point operations on at least one of Graphical Processing Units (GPUs), Tensor Processing Units (TPUs), Neural Processing Units (NPUs), Artificial Intelligence Processors (AIPs), or Central Processing Units (CPUs).

An electronic device according to various embodiments of the present disclosure may comprise: at least one memory including a volatile memory and a non-volatile memory; and at least one processor. The at least one memory may store instructions that may be executed by the at least one processor and, when executed, cause the electronic device to: detect an access to a page of a memory mapped file of a process being executed; store a first memory address for the page of the memory mapped file; in response to generation of a signal, identify whether the signal has been generated due to an error related to the page on the basis of a second memory address included in the signal and the stored first memory address; and if the signal has been generated due to the error related to the page, change an address value of the page to a predetermined third memory address. Various other embodiments are possible.

The invention provides an energy storage power station operation data management method and system in the technical field of energy storage power stations, and the method comprises the steps: S1, enabling a middle computer of an energy storage power station to collect the operation data of all equipment, and carrying out the preprocessing of all operation data; s2, the middle computer sends all the operation data to the upper computer in real time through MQTT; s3, the upper computer receives the operation data in real time and stores the operation data in a pre-created message queue; s4, the upper computer takes out the operation data from the message queue, and generates a memory mapping file based on the read operation data; s5, the upper computer obtains an off-line file generated by automatically caching the running data after the MQTT is disconnected from the upper computer through the FTP, the off-line file is spliced to the end of the memory mapping file, and a spliced mapping file is obtained and stored; and step S6, reading the operation data based on the spliced mapping file. The method has the advantages that the storage reliability and the access efficiency of the operation data of the energy storage power station are greatly improved.

The invention relates to molecular dynamics simulation, in particular to a molecular dynamics simulation system which is characterized in that a CPU (Central Processing Unit) host end reads a system topology file and a system parameter file by adopting a memory mapping file technology, and stores the system topology file in an array form of an array structure (SoA); after the DCU / GPU equipment end receives the data copied from the CPU host end, molecular simulation is carried out through a simulation channel, the simulation channel is an ensemble base class std:: vector, and the data records an operation identifier of each segment of ensemble; the execution sequence of each ensemble in one step is a list builder, a speed controller, a position controller, a particle acting force controller, a speed controller and a temperature / pressure controller; compared with the prior art, the method has the advantage of high compatibility, can stably run in a domestic system, a domestic CPU and a domestic DCU, and is compatible with a non-domestic system, a CPU and a GPU.

The embodiment of the invention relates to the technical field of automobile electronic software development, in particular to a software configuration method and device, computer equipment and a storage medium. The method mainly comprises the following steps: determining a target component from an upper computer configuration component library according to function introduction information, generating a visual configuration interface comprising a plurality of configuration items corresponding to the target component, generating a function configuration file according to function parameter information input by the visual configuration interface, and executing the function configuration file according to security requirement information. And determining a corresponding memory interval according to the function configuration file, generating a memory mapping file, and obtaining target configuration code data according to the function configuration file and the memory mapping file, so that the automobile controller realizes a function corresponding to the to-be-configured software. By adopting the method, the software development efficiency can be improved.

The invention discloses a memory allocation method and device, equipment, a medium and a product, and relates to the technical field of vehicles. The memory allocation method comprises the following steps: configuring a corresponding relationship between a target file and a memory space; in the memory mapping file, a target code segment is added, the target code segment is used for distributing a first variable in a target file to a memory space having a corresponding relation with the target file, and the first variable is a variable without a specified memory address; when the target file is compiled, the target code segment in the memory mapping file is called, and the variables are distributed to the memory space. Through the scheme disclosed by the invention, the variable of the non-specified memory address in the target file can be allocated to the memory space having the corresponding relationship with the target file, so that the problem of data consistency and the influence on the access performance of the hotspot access variable are avoided.