15 results about "Memory-mapped file" patented technology

The invention discloses a simulator detection method and system based on multi-dimensional feature fusion, and relates to the technical field of simulator detection, and the method comprises the steps: collecting the static feature information of a to-be-detected device; reading a memory mapping file of the equipment process in a preset time window, and obtaining a memory address allocation state at each moment to form a time sequence data set; further constructing an address space evolution sequence, and performing domain theory modeling to construct an address space domain; obtaining an address evolution function through a function construction algorithm; generating a regular mark through a natural transformation detection algorithm; performing topological structure analysis and coherence calculation on the address space category to generate address space complexity features; static feature information, regular marks and address space complexity features are integrated through a multi-layer fusion strategy, and simulator detection results are screened, judged and output layer by layer. According to the method, through a complementary collaborative system of static verification, dynamic rules and topology complexity, the anti-avoidance capability and robustness of detection are improved.

This invention discloses an inter-process message distribution method, apparatus, and electronic device, relating to the field of communications. When a test environment process is detected to need message interaction with an ECU via a real adapter CAN channel, the test environment process is controlled to interact with the ECU via a first virtual adapter CAN channel. When a CAN tool process is detected to need to use the same real adapter CAN channel for message acquisition, the CAN tool process is controlled to read messages from a memory-mapped file via a second virtual adapter CAN channel. The first and second virtual adapter CAN channels share a memory-mapped file, and each virtual adapter CAN channel consists of a memory-mapped file and a message queue. When the test environment process and the CAN tool process acquire the same messages, they can share messages through the shared memory-mapped file, thereby improving the resource utilization of the adapter.

The invention discloses a zero-copy serialization method and device based on memory mapping, equipment and a medium, and relates to the field of data processing. In the method, a root object to be serialized is received, the root object and sub-objects are analyzed, and a field to be serialized is identified; constructing an object graph containing the reference relationship between the objects; in the object graph, recursively calculating the data size required for serializing the root object and the sub-object to obtain the total serialization size; according to the total serialization size, selecting and distributing a corresponding memory block from a preset layered memory pool, creating a memory mapping file corresponding to the memory block, and establishing a memory mapping buffer area based on the memory mapping file; traversing the object graph, and writing data of the root object and the sub-object into a memory mapping buffer area; the total length of the data is actually written into the memory mapping buffer area, and the total length of the data is written back into the reserved head area of the memory mapping buffer area. By implementing the technical scheme provided by the invention, the data serialization efficiency is improved.

The application relates to the technical field of geographic information and data storage, and discloses a high-performance map storage updating method, which solves the problems in the background art, and comprises the following steps: dividing map data into a static layer and a dynamic layer, adopting column storage for the static layer, and adopting an in-memory mapping file for the dynamic layer; adopting Z-Order curve coding for the static layer data in combination with Delta compression, and using Snappy compression for the dynamic layer data and merging continuous frames based on time sequence similarity; adopting a multi-version concurrent control mechanism, associating a version chain with each data block, generating a new version for an updating operation, and appending the new version to the tail of the chain; and constructing a space-time joint index, and storing index partitions in distributed nodes. Through hierarchical storage, adaptive compression, distributed version control and joint indexing, the application effectively reduces storage overhead, improves incremental updating efficiency and space-time query performance, and is suitable for large-scale map data management scenes such as automatic driving and smart city.

The application provides a virtual machine linear memory expansion method and device, a storage medium and electronic equipment, and applies to the technical field of virtual machine memory. When an application is started, a software development kit is initialized, and a preset capacity of a memory linear allocator corresponding to a system version is obtained. A memory mapping file of the SDK is parsed, a memory region range is determined, and a local method is called to find a memory starting address. According to the address, the memory linear allocator is expanded, and a target buffer is allocated by using a memory mapping function. The application effectively solves the problem of virtual machine method number limitation by improving the memory capacity, ensures stable operation in all scenarios including startup and runtime dynamic loading, and reduces the situation of crash and installation failure.

The invention relates to the technical field of databases, and discloses a DuckDB-based lightweight non-instant disaster recovery OLAP database system, which comprises a server node, a webpage interface web ui and a business service client, a duckdb service is deployed on the server node, and the access of the duckdb service is packaged by adopting an asp.net core framework; the webpage interface web ui and the duckdb service are interacted with each other in a REST API (Application Program Interface) form; and the business service client side client service runs on the server node, and the business service client side client service writes data into the duckdb service by adopting a one-way memory mapping file (MMF). The method has an efficient OLAP processing capability, remarkably improves the processing performance of a large amount of time series data in writing, storing and reading links, is used for storing, querying and analyzing the large amount of time series data, and is particularly suitable for application scenes needing to process the large amount of time series data, such as the Internet of Things and industrial monitoring.

The invention provides a visual identification optimization method and system, electronic equipment and a storage medium, and the method comprises the steps: checking a current parameter of equipment, and determining a checked equipment parameter; performing data capture on the equipment with the adjusted equipment parameters to obtain original byte data; converting the original byte data to obtain a floating-point array; preprocessing the floating point type array to obtain preprocessed data; and writing the preprocessed data into an index position of the memory mapping file in a specified format by using a write pointer to obtain the written memory mapping file. According to the visual identification optimization method, initialization adjustment and original byte data conversion are carried out on the current parameters of the equipment, so that the accuracy and reliability of original byte data input are ensured, and a solid foundation is laid for subsequent image processing and analysis.

The application discloses a simulator detection method and system based on multi-dimensional feature fusion, and relates to the technical field of simulator detection.The method comprises the following steps: collecting static feature information of a to-be-detected device; reading a memory mapping file of a device process in a preset time window, obtaining memory address allocation states at each moment to form a time sequence data set; then, an address space evolution sequence is constructed, and an address space category is constructed through category theory modeling; an address evolution functor is obtained through a functor construction algorithm; regularity marks are generated through a natural transformation detection algorithm; topological structure analysis and homology calculation are performed on the address space category to generate address space complexity features; and the static feature information, the regularity marks and the address space complexity features are integrated through a multi-layer fusion strategy, and simulator detection results are output through layer-by-layer screening and judgment.The method improves the anti-avoidance capability and robustness of detection through a complementary and cooperative system of static verification, dynamic rules and topological complexity.

The application discloses an inference method and device of an industrial detection large model, equipment and a storage medium, relates to the field of edge computing, is applied to an edge inference end, and comprises the following steps: obtaining a target industrial detection large model, analyzing the target industrial detection large model by using a preset self-defined model loading tool to determine corresponding model weights; locking the basic weights to a target video memory partition corresponding to the target industrial detection large model by using a memory system of the edge inference end, and generating a memory mapping file corresponding to the target industrial detection large model based on the target video memory partition; obtaining to-be-inferred data corresponding to a target detection device, and calling the target industrial detection large model by using the memory mapping file to obtain an inference result corresponding to the to-be-inferred data based on a cross-modal feature pool corresponding to the target industrial detection large model. The application reduces the inference delay of the edge inference end.

A method and system for node-based volumetric data generation and real-time rendering for DCC and Unreal Engine is disclosed. The method includes the following steps: creating and editing volumetric data based on the OpenVDB library in an external node-based editing tool; converting the edited OpenVDB volumetric data into a linearized NanoVDB buffer in real time; transferring the NanoVDB buffer from the external node-based editing tool to the UE5 plugin within the Unreal Engine via a memory-mapped file; receiving the NanoVDB buffer and uploading it to the structured buffer of the graphics processor; and performing real-time sampling and rendering of the volumetric data in the structured buffer within the Unreal Engine. The system includes a node-based volumetric editing module, a data format conversion module, a real-time data bridging module, and an engine-side rendering integration module. This invention directly utilizes UE5's native advanced rendering features such as Lumen and volumetric fog, solving the fundamental problem of poor compatibility in existing solutions.

The embodiment of the invention provides a large file data extraction method and system. According to the method, firstly, a to-be-extracted file is directly mapped to a system memory space by utilizing a memory mapping technology to generate a memory mapping file, so that frequent data copying of a traditional file is avoided, and data access can be accelerated; then, based on the total size of a to-be-extracted file, data structure features and the current resource state of the system, the overall data extraction task is split into a plurality of subtasks, and a foundation is laid for subsequent parallel processing; according to the current load state of the system, corresponding threads are distributed to all the subtasks from a preset thread pool, data extraction operation of all the subtasks is executed in parallel through multiple threads, and the waiting time of task processing is shortened; and finally, integrating and outputting the data extraction results of all the sub-tasks to the target storage path, so that the data processing efficiency can be remarkably improved.

An electronic device according to various embodiments of the present disclosure may comprise: at least one memory including a volatile memory and a non-volatile memory; and at least one processor. The at least one memory may store instructions that may be executed by the at least one processor and, when executed, cause the electronic device to: detect an access to a page of a memory mapped file of a process being executed; store a first memory address for the page of the memory mapped file; in response to generation of a signal, identify whether the signal has been generated due to an error related to the page on the basis of a second memory address included in the signal and the stored first memory address; and if the signal has been generated due to the error related to the page, change an address value of the page to a predetermined third memory address. Various other embodiments are possible.

The present application relates to the technical field of dynamic plug-in, and particularly relates to a method and system for dynamically plugging in a function of a NEXT Native layer of a Hongmeng system.The method comprises the following steps: obtaining a process identifier of a target application process, so as to read a corresponding memory mapping file to obtain a loading base address and a file path of a Native layer ELF shared object; reading an ELF file corresponding to the file path, and establishing an index relationship table of a target function symbol name, a PLT entry and a PLT section file offset of each entry in a PLT section; adding the loading base address and the PLT section file offset to calculate a PLT section memory starting address; and calculating a memory absolute address of a target function PLT entry according to a PLT entry of a to-be-intercepted function in the index relationship table.The present application establishes an index relationship of a symbol and an address by analyzing a memory mapping file and an ELF shared object file of a target process, and realizes accurate function interception at a PLT entry level.

This invention provides a method and system for converting HDS logging data to DLIS format. The method includes the following steps: creating a region in the process address space when reading the HDS format source file using memory-mapped files; submitting the physical memory containing the HDS file already existing on disk to the region in the process address space; mapping the HDS file on disk to the process address space and establishing a data index; and constructing a DLIS converter object using object-oriented programming to perform DLIS format conversion on the HDS file. This invention's method for converting HDS logging data to DLIS format enables rapid reading of conversion file data, directly converting HDS format logging data files to DLIS data format, significantly saving time for field engineers and improving data format conversion efficiency.

The application relates to the technical field of data processing, and discloses a photovoltaic power station fault data analysis and intelligent diagnosis system. The system comprises a data access coding module, a gradient event triggering module, a dynamic routing temporary storage module, a zero-copy query module, an intelligent diagnosis module and an asynchronous compaction recovery module. During a smooth operation period of equipment, telemetry data is normally written into a bottom storage medium; when an abnormality is identified through spatial gradient and topological comparison and a trigger signal is generated, the dynamic routing temporary storage module transfers high-frequency data to a segmented memory mapping file, so as to avoid disk congestion. The zero-copy query module directly locks a memory boundary to construct a multi-dimensional wide table matrix through bit operation truncation by using time alignment masking, and the intelligent diagnosis module performs fault evaluation. After the abnormality is eliminated, the temporary storage data is asynchronously persisted and archived to the bottom disk. The application realizes ordered release of memory physical resources, standardized persistent storage of historical data, high-throughput reception of fault period data and extremely fast alignment analysis.