36results about How to "Shorten the connection path" patented technology

A semiconductor package substrate with embedded chip and a fabrication method thereof are provided. A first insulating layer is applied on a metallic board, and formed with at least one opening for exposing a portion of the metallic board. At least one semiconductor chip is mounted on the exposed portion of the metallic board. A support plate is mounted on the first insulating layer, and formed with a through cavity at a position corresponding to the opening of the first insulating layer, for receiving the chip in the through cavity. A second insulating layer is applied on the chip and the support plate. Insulating materials of the insulating layers fill a gap between the chip and the support plate. A circuit layer is formed on the second insulating layer, wherein the circuit layer is electrically connected to the chip by conductive structures formed in the second insulating layer.

A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer. In the present invention, the distance between the semiconductor package and the external device is increased, and thermal stress caused by difference between the thermal expansion coefficients is reduced, so as to enhance the reliability of the product.

A vehicle includes a motor housing accommodating motors for driving wheels, and a power control unit fixed on the motor housing. The power control unit includes: a stacked unit in which multiple power modules accommodating power semiconductor elements for electric power conversion and multiple coolers are stacked; and reactors. The stacked unit is disposed in the case of the power control unit such that the stacking direction of the power modules and the coolers is directed toward the vehicle-longitudinal direction. The reactors are disposed in the case so as not to overlap with the stacked unit as viewed from the stacking direction.

An electronic device is provided, in which semiconductor components are structurally identical among one another and have two groups of contact connections arranged on opposite main areas on a printed circuit board. Components are arranged in a manner laterally offset in a direction parallel to the printed circuit board area in such a way that, on opposite main areas, a group of first contact connections of a semiconductor component fitted on one main area is in each case arranged in the same region of the printed circuit board as a group of first contact connections of a semiconductor chip arranged on the opposite main area. Likewise, the groups of second contact connections of the semiconductor chips arranged on opposite main areas in each case attain congruence.

The utility model provides a battery pack which is provided with a battery (1), a circuit board (5) and an end part shell (6), wherein the circuit board (5) is provided with a charge and discharge protecting circuit, and is arranged on the end surface (3) of the battery; the end part shell (6) is provided with an external connecting terminal (7); the circuit board (5) is contained and arranged in the inside of the end part shell (6), both ends of the end part shell (6) are respectively combined with a head part (12a), and penetrated screws (12) are fixedly screwed in both ends of the end surface (3) of the battery (1) so as to fix the end part shell (6). The utility model realizes the battery pack which has the advantages of compact structure, small connecting resistance, high reliability and high productive efficiency.

A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.

A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.

A chip package including a semiconductor substrate is provided. A recess is in the semiconductor substrate and adjoins a side edge of the semiconductor substrate, wherein the semiconductor substrate has at least one spacer protruding from the bottom of the recess. A conducting layer is disposed on the semiconductor substrate and extends into the recess.

An external heat exchanger and the accumulator tank are disposed in the circulation path of a heat medium. In the air conditioner for a vehicle, the external heat exchanger is disposed in a sideways position between member front ends of a pair of left and right side members, extending in the vehicle longitudinal direction, with the heat-exchanging surface facing forward in the vehicle. The accumulator tank is disposed in a front corner area that is formed in a position that is to the outside in the vehicle width direction from the member front end of one side member of the pair of left and right side members, and that is in front of a vehicle wheel house covering a front tire.

The invention provides a groove type MOSFET device and a preparation method thereof. According to the groove type MOSFET device, the metal connecting part is arranged in the groove and located on the insulating layer, and the metal connecting part penetrates through the insulating layer at the bottom of the groove, a grid electrode and a gate oxide layer, so that an electric field protection part can be directly connected with the source electrode through the metal connecting part, namely, the electric field protection part is connected with the source electrode in a metal interconnection mode. The arrangement can greatly reduce the connection path, reduce the resistance, and finally improve the switching response of the device.

The invention discloses a sealing apparatus, a bipolar battery and a single battery. The sealing apparatus comprises a groove body, soft adsorption strips and a sealing upper cover which covers the upward side of the groove body; the groove body comprises two oppositely arranged groove walls; a groove wall positioning groove is formed in each of the two ends of each groove wall separately; a liquid binder is adsorbed and cured in each soft adsorption strip; the two ends of each soft adsorption strip are embedded into a pair of groove wall positioning grooves with opposite groove openings; multiple soft adsorption strips which are embedded into the groove wall positioning grooves in a stacked manner and the groove wall positioning grooves form a sealing end cover on the port of the groove body; the soft adsorption strips and the groove wall positioning grooves, the adjacent soft adsorption strips, the soft adsorption strip on the uppermost layer and the sealing upper cover, and the softadsorption strip on the lowest layer and the groove bottom are all in interference fit; and the groove body, the sealing end cover and the sealing upper cover form a sealed space. By virtue of the sealing apparatus, the connecting path of the adjacent single batteries can be greatly shortened, thereby lowering the internal resistance of the batteries, controlling temperature rise of the batteries, and further improving the discharging performance and prolonging the service life of the batteries.

A multilayer substrate includes at least three coil conductors respectively patterned on different surfaces of a first main surface of a laminated body, a second main surface of the laminated body, and laminated interfaces of insulating base materials and that are arranged in a lamination direction. The at least three coil conductors include first and second coil conductors, and are connected in series between first and second external electrodes. A surface at which another coil conductor is provided is not interposed between two surfaces at which the first and second coil conductors are provided, respectively. Further, the first and second coil conductors are directly connected to the first and second external electrodes, respectively, without another coil conductor interposed therebetween.