12 results about "Ripple cancellation" patented technology

The invention provides a cascade system control method and a cascade system, the cascade system comprises a first inductor and N power modules (N is an integer greater than or equal to 2), each power module is provided with a first side and a second side, a branch formed by connecting the first sides of the N power modules in series bears a first voltage, and the second side of the N power modules bears a second voltage. The second side of each power module is subjected to a second voltage. Each power module includes a switch operating with a switching cycle. And determining the number of the power modules working in the high-frequency modulation mode according to the ratio of the first voltage to the second voltage, so that the moment when the current flowing through the switch is 0 exists in one switching period. The invention provides a soft switching solution, which can reduce the turn-on loss and is favorable for improving the power density of the cascade system. The condition that ZVS cannot be realized when the duty ratio is about 0 or 1 in a carrier cascading modulation means and the condition that ZVS cannot be realized due to ripple cancellation in a carrier phase-shifting modulation means can be avoided.

The invention discloses a hysteresis current control method and system for a two-level grid-connected converter, and belongs to the technical field of converter control. The method comprises the following steps: fixing the switching frequency of the converter through a frequency inner ring; generating a reference square wave and collecting a switch square wave; multiplying and accumulating the two in each control step length, and taking an accumulated value as a phase discrimination result at the rising edge of a switching period to finish switching phase discrimination; comparing a phase discrimination result with a phase reference value, and processing the phase discrimination result by a PI (Proportional Integral) controller; pI output is processed and then fed back to a frequency instruction, a phase outer ring is formed through a frequency-phase integral relation, and closed-loop control of a switch phase is achieved. The technical problems that a traditional hysteresis control switch is random in phase and multi-machine parallel ripple offset cannot be achieved are solved, the advantage of dynamic performance of hysteresis control is kept, meanwhile, accurate fixing of the switching frequency and the phase is achieved, the system performance is remarkably improved, and the application scene of the system is expanded.

The invention discloses a high power supply rejection low dropout linear regulator based on level feed-forward ripple elimination. The high power supply rejection low dropout linear regulator is characterized by comprising an AEA error amplifier, a level shift circuit and an Mp power tube, the output end of the AEA error amplifier is electrically connected with the input end of the level shifting circuit through the zero point following circuit, the output end of the level shifting circuit is electrically connected with the grid electrode of the Mp power tube, and the source electrode of the Mp power tube is electrically connected with the VDD power supply; the drain electrode of the Mp power tube is electrically connected with one end of the resistor R1, the other end of the resistor R1 is grounded through the resistor R2, and the other end of the resistor R1 is electrically connected with the positive input end of the AEA error amplifier; the drain electrode of the Mp power tube is grounded through the CL capacitor, and the drain electrode of the Mp power tube serves as the output end of the high power supply suppression low dropout linear regulator and outputs voltage for eliminating feedforward ripple waves; and elimination of feed-forward ripples of the power supply voltage is realized.

Systems and apparatus for a voltage converter are described. A circuit may include a plurality of switching elements, a first transformer, and a second transformer. The first transformer may be configured to receive an input voltage at a first voltage level. The first transformer may be further configured to reduce the input voltage based on a state of the plurality of switches to generate an output voltage. The output voltage may be at a second voltage level less than the first voltage level. The second transformer may be connected in parallel with the first transformer. The second transformer may be configured to perform ripple cancellation on the output voltage. The second transformer may be further configured to provide the output voltage to a load operating at a second voltage level.

The invention provides a ripple elimination circuit with a self-zeroing function and a chopping operational amplifier, and relates to the technical field of analog integrated circuits, and the ripple elimination circuit comprises an input sampling unit, a post-stage chopping unit, an integral self-zeroing unit and a feedback unit. A first switch group is arranged in the input sampling unit, and a corresponding zero-setting switch group is arranged in the integral self-zero-setting unit. Through specific clock control, when the integral self-zeroing unit is in an offset voltage sampling phase, the first switch group is turned off, and an input sampling capacitor is physically isolated from a subsequent integral zeroing loop; and in a signal amplification phase, the first switch group is switched on, and a signal path is established. According to the design, the interference of external ripples on the offset voltage storage process at the sampling phase is effectively blocked, and the accuracy of the compensation current is remarkably improved in combination with optimized sequential control, so that an excellent ripple elimination effect and extremely low residual offset voltage are realized, and the method is suitable for an ultra-high-precision analog operational amplifier.

Systems and devices for voltage converters are described. A circuit can include a plurality of switching elements, a first transformer and a second transformer. The first transformer can be configured to receive an input voltage at a first voltage level. The first transformer can be further configured to reduce the input voltage to generate an output voltage based on states of the plurality of switches. The output voltage can be at a second voltage level that is less than the first voltage level. The second transformer can be connected to the first transformer in parallel. The second transformer can be configured to perform ripple cancellation on the output voltage. The second transformer can be further configured to provide the output voltage to a load that operates under the second voltage level.

The application provides a slope signal generation circuit and a slope signal generation method for a power converter. The slope signal generation circuit compensates the slope of the slope signal according to a slope compensation curve, and non-linearly adjusts the slope of the slope signal in a predetermined duty cycle interval of a current ripple cancellation point of the power converter. The slope signal generation circuit disclosed in the application is particularly suitable for multi-phase power converters and multi-level power converters, and can effectively solve the problem of gate pulse mixing near the current ripple cancellation point. By using the slope modulation technology, the circuit optimizes the dynamic response performance while maintaining system stability. In the working interval of the non-current ripple cancellation point, the circuit maintains a low slope signal slope to ensure the system bandwidth. In the predetermined duty cycle interval near the current ripple cancellation point, the slope signal slope is smoothly increased through a non-linear adjustment mode, thereby avoiding the system shock problem caused by the sudden change of the slope in the traditional scheme.

A voltage converter circuit includes a switched-mode voltage converter and a ripple cancellation circuit. The switched-mode voltage converter includes a first switching device having a first terminal coupled to a first power supply terminal, and a second switching device having a first terminal coupled to a second terminal of the first switching device, and a second terminal coupled to a second power supply terminal. The ripple cancellation circuit includes an op amp having a non-inverting input coupled to a load terminal; a first resistor coupled between the output of the op amp and an inverting input of the op amp; a second resistor coupled between the second terminal of the first switching device and the inverting input of the op amp; a first capacitor coupled in parallel with the first resistor; and a third resistor coupled between the output of the op amp and the load terminal.

This invention provides a method for eliminating DC secondary ripple in a through-type traction device based on multi-port collaboration, comprising: acquiring electrical quantities at three ports; constructing a second harmonic power component model for each port based on the electrical quantities at the three ports; constructing a secondary ripple elimination optimization model based on the second harmonic power component model, using the reactive power at the first input port, the reactive power at the second input port, and the voltage phase at the output port as optimization variables, with the objective function of minimizing the total second harmonic power on the DC side; solving the secondary ripple elimination optimization model to generate collaborative modulation control commands. This invention requires no additional hardware and can actively suppress DC-side secondary ripple simply by optimizing the control strategy. It can reduce DC bus voltage fluctuations, lower the requirements for supporting capacitor configuration, and is of great significance for improving the operational stability, power quality, and engineering application value of the new through-type traction power supply system.

The invention discloses an operational amplifier circuit and a PCB (Printed Circuit Board). The operational amplifier circuit comprises an external signal input end, a differential bootstrap input unit, a voltage differential hysteresis dynamic bias unit and a ripple offset unit, the external signal input end is used for providing a differential signal for the differential bootstrap input unit and providing a clock signal for the ripple offset unit; the differential bootstrap input unit is used for amplifying a differential signal and respectively sending a differential output voltage and a single-ended amplified signal to the voltage differential hysteresis dynamic bias unit and the ripple offset unit; the voltage differential hysteresis dynamic bias unit is used for feeding back dynamic bias current to the differential bootstrap input unit according to the signal change rate of the differential output voltage; the ripple offset unit is used for offsetting the clock ripple of the single-ended amplification signal according to the clock signal and outputting the single-ended signal; by introducing a differential bootstrap network, a signal slope dynamic matching mechanism and a ripple suppression circuit, the problems of limited noise suppression, extensive power consumption control and insufficient collaboration are solved.

This invention discloses an LDO circuit based on a flip-flop voltage follower and dual feedforward zero-point stability compensation, comprising a flip-flop voltage follower, a dual feedforward zero-point compensation network, an embedded feedforward ripple cancellation network, a bias network, and a level shifting network. The flip-flop voltage follower dynamically adjusts the output voltage of the power output PMOS transistor. The dual feedforward zero-point compensation network performs zero-point compensation on the two non-dominant poles of the circuit. The bias network provides appropriate bias to ensure that the MOS transistor in the error amplifier operates at the correct operating point, thereby providing sufficient DC gain. The embedded feedforward ripple cancellation network achieves a feedforward path by multiplexing the signal transmission path of the error amplifier, effectively reducing additional noise sources. Simultaneously, the feedforward gain of the embedded feedforward ripple cancellation network can be adjusted by the bias network to meet the ripple cancellation requirements, ultimately achieving a high power supply rejection ratio over a wide frequency range.

A method for reference ripple cancellation in an oversampled single-ended Successive Approximation Register (SAR) Analog to Digital Converter (ADC) includes sampling an input voltage onto a plurality of first capacitors of a switching Digital to Analog Converter (DAC) during a sampling phase. A first output of the switching DAC is compared to a second output of a non-switching DAC during a first conversion phase. A first digital code is generated from the comparison of the first output to the second output. The first digital code is applied to the non-switching DAC during a second conversion phase subsequent to the first conversion phase.