110results about How to "Avoid data corruption" patented technology

Systems, methods, apparatus and software can make use of coordinator resources and SCSI-3 persistent reservation commands to determine which nodes of a cluster should be ejected from the cluster, thereby preventing them from corrupting data on a shared data resource. Fencing software operating on the cluster nodes monitors the cluster for a cluster partition (split-brain) event. When such an event occurs, software on at least two of the nodes attempts to unregister other nodes from a majority of coordinator resources. The node that succeeds in gaining control of the majority of coordinator resources survives. Nodes failing to gain control of a majority of coordinator resources remove themselves from the cluster. The winning node can also proceed to unregister ejected nodes from shared data resources. These operations can be performed in parallel to decrease failover time. The software can continue to execute on all nodes to prevent additional problems should a node erroneously attempt to reenter the cluster.

A system and methods for coordinating transmissions in a wireless network wherein a plurality of frequency-overlapping protocols are used to exchange information between devices. In this system, a coordination point device integrates a monitoring functionality to identify impending data collisions between the frequency-overlapping protocols. The coordination point device further identifies quality of service parameters to determine if the protocols are operating within desirable ranges. Moderation one or more of the protocols is then performed to avoid data collisions arising from overlapping transmissions between the protocols while maintaining data throughput within acceptable ranges.

A high availability database system, subject to a failure causing data corruption in the active server system, may recover valid data prior to the corruption, and use the protected and recovered data to effect a failover. At the time T1 when a stand-by computer system detects the occurrence of a failure, a pair split is done to the data area to protect the data area time T0, just before the occurrence of the failure, and another pair split is done to the log area at the time, where the log area is corrupted or a time T3, where the failover is to take effect without corrupting data, to protect the log area containing data at a given time between time TO and time T3. By using the data and log areas thus protected, the stand-by computer system may take over valid data and log areas of the given time to perform a failover.

An apparatus and method implemented in hardware and embedded software that improves performance, scalability, reliability, and affordability of Storage Area Network (SAN) systems or subsystems. The apparatus contains host computers (application servers, file servers, computer cluster systems, or desktop workstations), SAN controllers connected via a bus or network interconnect, disk drive enclosures with controllers connected via network interconnect, and physical drive pool or cluster of other data storage devices that share I/O traffic, providing distributed high performance centrally managed storage solution. This approach eliminates I/O bottlenecks and improves scalability and performance over the existing SAN architectures. Although this architecture is network interconnect (transport) neutral, additional improvements and cost savings could be made by utilizing existing, of the shelf, low latency and high speed hardware such as Advanced Switching (AS) or Myrinet networks as a transport for data, Small Computer System Interface (SCSI) and other commands and messages. Using AS or Myrinet network as a replacement for Fiber Channel (FC) would significantly reduce the cost of such SAN systems and at the same time boost performance (higher data transfer rates and lower latencies). This invention is about defining hardware and software architectural solution that is specifically designed to eliminate I/O traffic bottlenecks, improve scalability, and reduce the overall cost of today's SAN systems or subsystems. This innovative solution, in addition to it's performance superiority compared to the existing solutions, should also provide 100% compatibility with the all existing Operating Systems (OS), File Systems (FS), and existing applications.

A method of storing data in a ferroelectric memory device is capable of dealing with a program request during a read cycle or a change in program data during a program cycle. In this data storage method, the program cycle or the read cycle is performed for selected memory cells selected from among a plurality of memory cells, and each of the program cycle or the read cycle includes a period for writing data “0” and a period for writing data “1” into the selected memory cells. When a program request occurs in the period for writing the data “0” (read period) in the read cycle, the data “1” is written into the selected memory cells according to program data designated by the program request.

Improved techniques for controlled take over of services for clustered computing systems are disclosed. The improved techniques can be implemented to allow one sub-cluster of the clustered computing system to safely take over services of one or more other sub-clusters in the clustered computing system. Accordingly, if the clustered computing system is fragmented into two or more disjointed sub-clusters, one sub-cluster can safely take over services of the one or more other sub-clusters after the one or more other sub-clusters have been shutdown. As a result, the clustered computing system can continue to safely provide services even when the clustered computing system has been fragmented into two or more disjointed sub-clusters due to an operational failure.

Various methods, systems, and processes to prevent data corruption caused by a pre-existing split brain condition in a cluster are presented. In response to determining that a node is no longer part of a sub-cluster, another node in the sub-cluster is designated as a racer node. The racer node accesses a matrix, and the matrix includes information to determine whether a majority of coordination points in a cluster are accessible by nodes in the sub-cluster. Based on the accessing, a determination is made that the information indicates that the majority of coordination points are accessible by the nodes. The information is then broadcasted.

A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

The microcomputer shall be offered which has realized more simplified peripheral circuits and more reduced price, besides being provided with the functions of timer, runaway monitor and backup logic. To that effect, the address register and the register are installed which have two areas each in correspondence with two tasks (CPU0 and CPU1) to perform a pipeline processing of the two tasks in parallel and in time division by changing over alternately the two areas of the address register and the register by means of task switching signal. Then, while composing one task (L-task) with a fix-looped program for which a branch instruction is prohibited, the L-task is embedded with a routine to execute a runaway monitor and a timer operation for the other task (A-task). Furthermore, in case where anything abnormal is detected by L-task about the processing of A-task and it is reset, the L-task will execute a backup sequence to obtain a failsafe of the system.

The SRAM cells of a semiconductor storage device each comprise first and second inverter circuits loop-connected with each other to form a hold circuit; two access transistors; and a hold control transistor connected in series with a drive transistor of the second inverter circuit. While the memory cell is not accessed, the hold control transistor causes the first and second inverter circuits to form the loop connected hold circuit for statically holding data. When the memory cell is accessed, the hold control transistor causes the first and second inverter circuits to be disconnected from the loop connection for dynamically holding data, thereby preventing data corruption that would otherwise possible occur due to a read operation. Moreover, a sense amplifier circuit that uses a single bit line to read data from a memory cell is disposed in a space appearing in the memory cell array, thereby effectively using the area.

A data access system has host computers having front-end controllers nFE_SAN connected via a bus or network interconnect to back-end storage controllers nBE_SAN, and physical disk drives connected via network interconnect to the nBE_SANs to provide a distributed, high performance, policy based or dynamically reconfigurable, centrally managed, data storage acceleration system. The hardware and software architectural solutions eliminate BE_SAN controller bottlenecks and improve performance and scalability. In an embodiment, the nBE_SAN (BE_SAN) firmware recognize controller overload conditions, informs Distributed Resource Manager (DRM), and, based on the DRM provided optimal topology information, delegates part of its workload to additional controllers. The nFE_SAN firmware and additional hardware using functionally independent and redundant CPUs and memory that mitigate single points of failure and accelerates write performance. The nFE_SAN and FE_SAN controllers facilitate Converged I/O Interface by simultaneously supporting storage I/O and network traffic.

When configuring volume allocation on a storage device, it is confirmed that design information on the volume allocation is in compliance with an operational policy of a system and there is no mistake in design so as to configure the volume allocation on the storage device in the case where there is no problem. A computer system including: a host computer 2; a storage device 3 for providing a volume to the host computer 2 via a one network 5; and a management computer 1 connected to the storage device 3 via a network 6, wherein when a storage manager configures volume allocation of the storage device 3, the management computer 1 gathers configuration information on the volume allocation from the storage device 3 and makes a comparison between design information on the volume allocation to be configured on the storage device 3 inputted by the storage manager and the gathered configuration information on the volume allocation so as to identify changes.

An apparatus has a plurality of storage units. A parity generator is configured to generate a parity value in dependence on the respective values stored in the plurality of storage units. The parity generator is configured such that determination of the parity value is independent of a read access to the data stored the plurality of storage units. A detector is configured to detect a change in value of the parity value.

To support interleaving of optical channels and to provide sufficient isolation between such interleaved channels, a circulator (60-62) receives, on an optical fiber (16-18), a broadband signal containing a plurality of adjacent channels. The circulator selectively routes the broadband signal through a filter (64, 66) to isolate, on an individual basis, at least one desired channel. A filtered signal, corresponding to the at least one desired channel, is then output from the filter (64-66) and reflected back into the filter by a mirror (68-70) such that the at least one desired channel is subjected to a second filtering process that further improves isolation of the at least one desired channel. Following this second filtering process, the at least one desired channel is applied to the circulator (60-62) for re-inserting into the optical fiber (16-18), as illustrated in FIG. 6. To mitigate the effects of four-wave mixing in each bidirectional optical fiber, a channel assignment plan ensures that pairs of adjacent channels are assigned on a mutually exclusive basis to at least one of an up-link and a down-link direction.

A host device 200A includes a data buffer 250. When data has been already written to a part of a physical block and data is additionally written to the physical block, it is determined whether or not the data written to the physical block is held in the data buffer. When the data is held, data is written to the block, and when an error exists, data in unit of physical blocks is rewritten. When the data is not held in the data buffer, a new physical block is required to be secured and then, data is written to the new block. Thereby, even when power is shut off or an error occurs during writing in the semiconductor memory device, destruction of data already written is prevented.

For coordinated disaster reovery, a reconciliation process is performed for resolving intersecting and non-intersecting data amongst disaster recovery systems for takeover operations. An ownership synchronization process is coordinated for replica cartridges via the reconciliation process at the disaster recovery systems. The disaster recovery systems continue as a replication target for source systems and as a backup target for local backup applications.

A ferroelectric memory of the present invention comprises: a plurality of normal cells, each of which includes a first ferroelectric capacitor for holding data and a first transistor connected to a first electrode of the first ferroelectric capacitor; a first bit line connected to the first transistor; a first bit line precharge circuit which is a switch circuit provided between the first bit line and a ground; and a word line connected to a gate of the first transistor. The word line is deactivated to disconnect the first ferroelectric capacitor from the first bit line before the first bit line precharge circuit is driven to discharge a potential of the first bit line.

The embodiment of the invention provides a data storage method, a storage array and a host computer server, relates to the technical field of storage, and solves the problem of data corruption or service interruption caused by the fact that the change of a mapping relation between a logical disk in the storage array and a virtual disk in the host computer server cannot be updated in real time on the host computer server after the change of the mapping relation cannot be solved completely in the prior art. The method comprises the following steps: receiving an I/O request sent by the host computer server by the storage array, wherein the I/O request is carried with a first token; matching the first token with a plurality of current tokens by the storage array; if one current token same as the first token exists in the current tokens, processing the I/O request through the logical disk corresponding to the current token same as the first token by the storage array, and sending a message that the I/O request is successfully processed to the host computer server; and if the one current token same as the first token does not exist in the current tokens, sending a message that the I/O request is unsuccessfully processed to the host computer server by the storage array.