On a substrate, the pattern of the first conductive layer is defined, that is, a gate line combination including gate pads, scanning lines
and gate electrodes. A gate insulating layer, a
semiconductor layer, a doped
semiconductor layer and a second conductive layer are deposited on the substrate and the above-mentioned gate line combination in sequence. A
photoresist layer is overlaid on the second conductive layer. The
photoresist layer within the aperture areas is fully exposed. Using a half-tone
mask or a slit pattern to make parts of the
photoresist layer
lying on the gate pads and the gate electrodes are not exposed to its full depth. As a result, the photoresist pattern formed varies in thickness. After being processed with
drying etching and wet
etching for several times, all the
layers previously deposited within the aperture areas can be totally etched and removed. However, as regards the
layers deposited on the gate pads and the gate electrodes,
etching only takes place in those
layers above the
semiconductor layer. Then, an organic
protection layer is laid on the substrate and the above-mentioned structure, and the holes, which are to function as the passageways for the transparent conductive layer to contact the metallic layer, are defined on the organic
protection layer. Then, the gate pads are exposed out of holes above them, using
dry etching again. Lastly, the pattern of the transparent conductive layer is defined on the organic
protection layer and in the plurality of holes.