163 results about "Interchange circuit" patented technology

A computer network is disclosed comprising a plurality of interconnected computer devices including a plurality of disk drives for storing network data, each disk drive comprising a head and a disk. The computer network comprises a plurality of interconnected nodes, and a reservation facility for reserving resources within the disk drives and the nodes to support a predetermined Quality-of-Service constraint with respect to data transmitted between the disk drives through the nodes of the computer network. In one embodiment, a switched node is disclosed comprising switching circuitry having more than two bi-directional ports for simultaneously transmitting data in multiple dimensions through a computer network, a disk for storing data, a head actuated over the disk for writing data to and reading data from the disk, and a reservation facility for reserving resources associated with data read from the disk and written to the disk to support the predetermined Quality-of-Service constraint with respect to data transmitted through the computer network.

A Voice over IP network having multiple signaling message transfer nodes (e.g., call agents, signaling gateways), communicate with switched circuit network nodes using a single point code. A signaling gateway, upon receiving an SS7 signaling message specifying a destination point code corresponding to its provisioned point code and carrying a signaling application protocol message, selects a destination call agent based on the originating point code in the SS7 signaling message and independent of the destination point code. The signaling gateway selectively outputs to the selected destination call agent an IP-based message carrying the signaling application protocol message according to a prescribed IP-based signaling message transport protocol, based on a determined availability of the selected destination call agent. The signaling gateway uses the User Part Unavailable message to inform the originating PSTN switch that the selected destination call agent is unavailable.

A communication infrastructure for a data processing apparatus, and a method of operation of such a communication infrastructure are provided. The communication infrastructure provides first and second switching circuits interconnected via a bidirectional link. Both of the switching circuits employ a multi-channel communication protocol, such that for each transaction a communication path is established from an initiating master interface to a target slave interface, with that communication path comprising m channels. The m channels comprise one or more forward channels from the initiating master interface to the target slave interface and one or more reverse channels from the target slave interface to the initiating master interface, and handshaking signals are associated with each of the m channels. The bidirectional link comprises n connection lines, where n is less than m, the bidirectional link supporting a first communication path from the first switching circuit to the second switching circuit and a second communication path in an opposite direction from the second switching circuit to the first switching circuit. Control circuitry is used to multiplex at least one forward channel of the first communication path and at least one reverse channel of the second communication path, with the multiplexing being performed in dependence on the handshaking signals associated with the channels to be multiplexed. This allows the 2m channels formed by the first and second communication paths to be provided by the n connection lines of the bidirectional link.

A network edge device includes switching circuitry configured to switch traffic from one or more endpoint devices to corresponding application services over a network; and processing circuitry configured to monitor the traffic from the one or more endpoint devices, compare the monitored traffic to classify the one or more endpoint devices into a corresponding trust level of a plurality of trust levels, and route the traffic from each of the one or more endpoint devices based on its corresponding trust level. The network edge element is configured to provide network connectivity to the one or more endpoint devices.

A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange.

A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange.

Method and apparatus for reducing power consumption in a digital specific signal processor integrated circuit. Data buses are routed through multiplexers to reduce the number of busses routed across an integrated circuit and maintain their prior state. Global memory is clustered into memory clusters. The memory cluster having a memory block to be accessed is activated without activating other memory clusters in the global memory. Inactive data buses retain their state by use of bus state keepers. A loop buffer stores instructions within program loops to avoid memory accesses. Functional blocks can have their clocks gated instruction by instruction to lower power consumption. RISC and DSP units swap circuit activity to reduce power consumption. Local data memory is includes self-timed memory access activation and provides for off boundary access to further lower power consumption.

A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange.

A radio card, such as a PCMCIA card, received by an electronic device has a first interface coupling radio circuitry within the radio card to the electronic device. The radio card also has a second interface, independent of the first interface, that couples with an antenna disposed within the electronic device upon receipt of the radio card by the electronic device. The second interface may comprise a plurality of antenna contacts located along tracks of the electronic device used to aid reception of the radio card. A second and possibly external antenna may also automatically couple with the second interface upon insertion. By selective placement of the antenna contacts on the radio card, a specific one of the antennas may be selected. Otherwise, internal switching circuitry supports antenna diversity or simultaneous use of a plurality of antennas.

An IP communication interface device includes first and second connecting units, and first, second and third processors. The first processor coding first media data as B-channel data inputted to the first connecting unit from a circuit switched network, decoding packet-disassembled media data into which a packet of second media data inputted to the second connecting unit from a LAN is disassembled, and transmitting the decoded media data to the first connecting unit for forwarding as the first media data to the circuit switched network. The second processor packetizing first coded media data, disassembling the packer of the second media data, and transmitting as packet-disassembled media data to the first processor. The third processor generating second media data by adding header data to the packet-assembled media data of the second processors forwarding the second media data to the LAN via the second connecting unit, removing header data, and transmitting the header-less second media data to the second processor.

When a decision circuit (217) incorporated in a control circuit (21) in an instruction decode unit (2) in a microprocessor (1) decides that an integer operation unit (4) can not execute a following sub instruction, the decision circuit (217) controls each of selectors (211, 214, and 215) and an exchange circuit (216) so that a memory access unit (3) that has already executed a preceding sub instruction can execute the following sub instruction.

A method and system for providing a network which routes telephone calls to the dial-up access line of on-line data services, such as an Internet Service Provider. The calls are routed over, over data trunks to a circuit-switch that consolidates access to on-line data services. The data trunks are separate from trunks carrying normal voice telephone calls. At the originating office where the telephone call originates, the call is recognized as a call to a telephone number associated with the dial-up access telephone number of an on-line data service. A database selects a route over a data trunk to the terminating office having a circuit-switch that consolidates access to the on-line data services. The consolidation of access to on-line data services over segregated data trunks to a single circuit-switch reduces congestion in the network by relieving the network from handling a large volume of long duration telephone calls.

Method and system to manage the state maintenance and the traffic maintenance of a Signalling Gateway Process (SGP), and of the corresponding Signalling Gateway (SG) or SGs served by such SGP, in scenarios where traditional Switched Circuit Network (SCN) signalling is transported over data networks, such as IP-networks. The method and the system for implementing the method involve defining a set of messages exchanged between a SGP and one or a set of concerned (connected) Application Server Process (ASP); driving the corresponding state-machines by the reception of such messages; and defining procedures for sending such messages and for receiving such messages. These messages can, optionally, convey also information about the destination routing parameters served by the SGP that become available or unavailable in the SCN through such SGP.

The invention relates to a dual MCU control system applied to an automobile electronic parking brake. The dual MCU control system is characterized by comprising a microcontroller MCU1#, a microcontroller MCU2#, a control switching circuit, H-Bridge driving circuit, a parking switch circuit and a biaxial acceleration sensor; the microcontroller MCU1# and the microcontroller MCU2# are the core modules of an electronic parking brake control system, and the microcontroller MCU1# and microcontroller MCU2# implement the control switching circuit to realize the control over a parking motor by detecting the parking switch circuit and biaxial acceleration sensor signals; and the dual circuit MCU system is the core of the control system, can independently control a drive circuit to realize the control over an electronic parking brake motor, can switch to the other circuit to continue to control after one of MCU circuits fails to control, realizes redundant backup of the control system, obtain better system backup, and realizes high safety and high reliability of the system.

An octagonal interconnection network for routing data packets. The interconnection network comprises: 1) eight switching circuits for transferring data packets with each other; 2) eight sequential data links bidirectionally coupling the eight switching circuits in sequence to thereby form an octagonal ring configuration; and 3) four crossing data links, wherein a first crossing data link bidirectionally couples a first switching circuit to a fifth switching circuit, a second crossing data link bidirectionally couples a second switching circuit to a sixth switching circuit, a third crossing data link bidirectionally couples a third switching circuit to a seventh switching circuit, and a fourth crossing data link bidirectionally couples a fourth switching circuit to an eighth switching circuit.