This invention belongs to the field of
digital control systems for power electronic devices. It provides a high-speed communication
system and method for multiple units of CHB frequency converter based on FPGA ping-pong buffer. By building an efficient
parallel processing architecture at the FPGA hardware level, it realizes zero-wait instruction issuance and instantaneous status acquisition between the controller and dozens of
distributed power units, compressing the
system communication and
processing time from milliseconds to hundreds of microseconds, achieving the technical effect of CHB frequency
converters achieving extremely short control cycles and high dynamic performance.