69 results about "Binade" patented technology

The invention provides a large model assisted Fuzz test Harness generation method and system, and the method comprises the steps: migrating a library of a QNX platform to a Linux environment for operation, and carrying out the glue code packaging of interface difference and system call difference through the generality that the library of the QNX platform and the Linux environment share a POSIX standard, thereby achieving the automatic adaptation of key API and context constraint; then analyzing binary semantics by means of an intelligent Agent constructed by a large model, automatically generating a Harness skeleton, focusing potential dangerous points (such as memory management, character string processing functions and the like), generating an initial seed in combination with a static or dynamic analysis result, and finally executing a Fuzz test in a controllable execution environment. And high coverage and rapid vulnerability positioning of the multi-dimensional attack vector of the target library are realized. The technical problems that Harness writing highly depends on expert experience, a customized generation strategy for target binary semantics is lacked, and comprehensive understanding on the binary semantics and context constraints is lacked are solved.

A computing system can obtain a machine-learned model comprising one or more parameters having a four-bit binary format. The four-bit binary format can correlate a plurality of sixteen respective binary values to a plurality of sixteen corresponding numerical values represented by the binary values. The sixteen numerical values can be symmetric about a median. A plurality of step sizes between the sixteen numerical values can be non-uniform. The computing system can obtain one or more input values for one or more layers of the machine-learned model. The computing system can process, based at least in part on the one or more parameters having the four-bit binary format, the one or more input values to generate one or more output values.

This invention belongs to the field of power grid fault diagnosis technology and discloses a power grid fault diagnosis method and system based on differential evolutionary logic operations. The method includes: collecting the action information of protection devices and circuit breakers in the power system; filtering out a set of candidate elements that have experienced faults based on preset association rules between faulty elements and protection / circuit breaker actions; establishing a 0-1 integer programming model based on the determined protection action information, circuit breaker action information, and candidate element set; and solving the 0-1 integer programming model using an improved differential evolutionary algorithm based on logic operations to determine the fault state of the candidate elements. This invention directly encodes individuals using binary, eliminating the need for floating-point to binary conversion. It also constructs a binary mutation operator and an improved crossover operator based on logic operations and employs adaptive parameter adjustment to balance the population diversity and search efficiency of the algorithm.

Systems, methods, and software can be used to detect backdoors in binary software code. In some aspects, a method comprises: obtaining, by a server, binary software code corresponding to source code; generating, by the server, a backdoor abstraction of the binary software code; and generating, by the server, a backdoor risk assessment based on the backdoor abstraction of the binary software code.

The invention discloses a cross-ISA (Industrial Standard Architecture) extension program translation method based on binary rewriting, which comprises the following steps of: 1) naming an instruction set ISA of a program to be translated as an original ISA, and naming an instruction set ISA on target hardware for running original ISA extension as a target ISA; 2) performing comparative analysis on a binary file corresponding to the original ISA extension compilation and a binary file corresponding to the target ISA extension compilation to obtain an instruction needing to be translated relative to the target ISA extension in the original ISA extension, and segmenting the instruction into a plurality of program basic blocks needing to be translated; 3) allocating a jump instruction and an address space for translating and storing translated codes to each program basic block; (4) distributing the program basic blocks into the corresponding address spaces through a jump instruction to carry out static binary translation, and generating a static file; and (5) distributing a loading address for the static file by utilizing a loader according to the address distribution information in the static file, and loading the static file to a corresponding position.

The invention provides a floating point unit exception handling method and device of an industrial safety operating system and a medium. The method comprises the following steps: hooking a floating point exception handling function at an undefined instruction exception entry, and enabling the exception of a floating point unit to enter a unified handling flow; reading an abnormal comprehensive register of the processor to identify the floating point operation exception type, and reading a program counter register to obtain a trigger instruction address; performing standardized calculation on the operation under abnormal conditions according to a binary floating point arithmetic standard, generating result data corresponding to the operation, and forming abnormal mark information; writing the result data back to the destination register, and calculating a next instruction address according to the instruction set rule; and outputting the trigger instruction address, the exception type, the source operand and the result data as exception information through an interface from the kernel to a user side. According to the method, instant processing of the abnormal trigger point, continuous execution of the instruction, real-time output of the abnormal context and reduction of positioning and recovery time delay can be realized.

The invention relates to the field of intelligent analysis, and particularly discloses a binary code-oriented static taint analysis system and method, which introduces an on-demand micro-symbol execution mechanism on the basis of basic data flow analysis through binary lifting and control flow diagram construction, that is, aiming at memory ambiguous nodes in a data dependence diagram, a micro-symbol execution mechanism is introduced on the basis of the basic data flow analysis; refined alias analysis is achieved through reverse instruction slicing and constraint solution, then an enhanced data dependency graph is generated, and path-sensitive taint propagation iteration is conducted on the basis to generate a final taint state table. In this way, complex dynamic memory addressing can be effectively recognized, taint chain breakage and misinformation explosion caused by ambiguity ignoring or excessive approximation are avoided, and resource allocation of an analysis engine is remarkably optimized.

The invention relates to the technical field of network security and software reverse engineering, and discloses a binary function symbol recovery method based on LLM fusion interprocess context. The method comprises the following steps: firstly, extracting multi-dimensional feature information from a target binary function, wherein the multi-dimensional feature information comprises a function body pseudo code, a call point context code snippet, call chain information and a character string parameter transmitted by a call point; then, the multi-dimensional information is structured and constructed into prompts, the prompts are input into a large language model which is finely adjusted by a specific task for reasoning, and finally candidate function names are generated. The invention further discloses an LLM fine tuning technology fusing the multi-dimensional context information. According to the LLM fine tuning technology, efficient parameter fine tuning is carried out on the basic model by constructing a training sample set containing a function body, a calling context and character string parameters. According to the method, the inter-process context information is systematically introduced, so that the accuracy and semantic fitness of binary function symbol recovery are remarkably improved.

There are provided systems and methods for reducing quantization errors, including method of optimizing a routine for a hardware-based processing system having a fixed length two's complement binary representation, the method comprising: receiving an instruction sequence arranged to perform the routine, wherein the instruction sequence comprises a set of arithmetic operations, wherein the outputs of the arithmetic operations exceed a precision of the hardware-based processing system; identifying one or more pairs of sub-sets of instructions in the sequence of instructions, the sub-sets of each pair having a respective comparable truncation error; and generating an optimized routine by modifying one of the sub-sets of each pair to invert the sign of one or more inputs to said sub-sets and modifying the instruction sequence to compensate for the said inversion.

This invention relates to a decomposition circuit (UPCK) for an input binary number in a binary arithmetic unit, the input number having an FP32 floating-point format, the decomposition circuit being hardwired to: decompose the input number ( X Decomposed into high and low component pairs with an internal format having a 9-bit exponent and 12-bit significant digits. Xh,Xl ); the significant number of the high component ( Hmm The bits of the input number are directly connected to the circuit that provides the value of the implicit bits and the most significant bit of the fractional mantissa; the significant bits of the lower components ( Xlm The bits of the input number are directly connected to the remaining bits of the decimal part; the input number ( X The index plus 12 is assigned to the index with the higher component () Loxhë ); and the input number ( X The unchanged index is assigned to the index with the lower component () Xle ).

A method used when adding two numbers in the form of binary strings, which makes a given bit position in one of the binary strings available to store a carry-over value. The method comprises the steps

According to the signaling analysis method based on control plane protocol transmission, an ASN.1 coding rule is adopted in a control plane protocol, and the method comprises the steps that at least one hidden signaling domain used for indicating the length of a data boundary is extracted from coded binary signaling data; positioning to the target cell based on the identification information of the target cell; based on the length information extracted from the hidden signaling domain, determining the offset and length of the target cell relative to the signaling initial position in the binary signaling data; and calling an analytic function to analyze the target cell based on the shift amount and the length. According to the method, the data processing delay can be reduced, and the cell extraction flexibility and response speed are improved.

Various embodiments provide a system, method, and device for generating a signature for Windows .NET binaries. The method incudes (i) generate a file signature based on code using a hashing technique, and (ii) classify a sample using the file signature based on the code.

To encode with CABAC, a non-binary syntax element value is mapped to a binary sequence (bin string), through a binarization process. A binary arithmetic coding engine encodes or decodes a bin, in a regular (context-based) mode and a bypass mode.

An extensible binary data model compiler is described. A receiver may receive binary specifications, binary data models and / or binary descriptions which are design documents, programming language source files, and / or interface description language definitions that describe, specify and / or model a binary communication protocol, binary data storage format, or binary data processing architecture. A categorizer may distribute binary descriptions to a respective loader, binary specifications to a respective compiler, and / or binary data models to a respective reader. Binary descriptions are normalized and compiled into generic binary models. Binary specifications are compiled into generic binary data models. A reader may read an existing binary data model. A resolver may generate a generic binary data model address for each generic binary data model element within a generic binary data model. A generic binary data model is an independent intermediate representation enabling shared analysis and operations.

A method for testing code coverage of a software program executed by a machine in an industrial system, comprising: obtaining a control flow model of a first version of the software program as a first control flow model; obtaining a control flow model of a second version of the software program as a second control flow model, wherein the second version is a modified version of the first version; comparing the first control flow model with the second control flow model, to identify one or more code changes of the second version compared to the first version; preparing a set of codes to be tested based on the identified one or more code changes; preparing test data for testing the coverage of the set of codes to be tested; compiling the second version into an assembly code or a binary machine code to be executed by a runtime environment of the machine; adding a check point into the assembly code or the binary machine code at a position corresponding to each code in the set of codes to be tested, wherein the check point is an instruction added into the assembly code or the binary machine code that enables the runtime environment to indicate, when the instruction of the check point is executed, that the code in the set of codes to be tested corresponding to the check point is executed; starting the execution of the assembly code or the binary machine code in the runtime environment using the test data; and determining whether each code in the set of codes to be tested is covered according to the indication from the runtime environment.

This invention discloses a collaborative obfuscation system and method based on heterogeneous execution, relating to the field of code protection, and representing a hardware-software collaborative code protection scheme. By constructing a covert execution environment on a solid-state drive (SSD), its internal structure, communication protocols, and firmware are analyzed and functionally extended, and a dedicated instruction space is partitioned. Simultaneously, based on the LLVM compiler framework, three collaborative obfuscation algorithms—control flow flattening, spoofed control flow, and data encryption—are researched and implemented to generate obfuscated binary code and extract key elements. Furthermore, communication facilities between the host and the SSD are established, a stable interaction process is designed, and collaborative obfuscation and anti-debugging functions are implemented. This invention effectively improves the code's resistance to static analysis and dynamic debugging, offering significant advantages over classical methods and providing a more effective solution for code protection.

A method for transmitting a first number to a recipient computing machine in a distributed computing environment is proposed, which comprises: obtaining a second number corresponding to the first number, wherein the first number belongs to a first range of numbers, and the second number belongs to a second range of numbers; determining an encoding of the second number according to a binary format for encoding floating-point numbers, wherein a binary code representing a number encoded according to the format comprises a sign binary field carrying at most one sign bits encoding a sign of the number, an exponent binary field carrying one or more exponent bits encoding an exponent of a power of 2, and a fraction binary field carrying one or more significant decimal digits and transmitting, to the recipient computing machine, data representing the first number, wherein the data carries an encoding of the second number according to the format with no exponent field corresponding to the encoded second number.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a random noise value for use in providing differential privacy in multiparty computation. One of the method includes receiving, by a first party participating in a multiparty secure computation (“MPC”) instance, a share of a first n-bit random binary number and a plurality of function table segments; generating a share of a second n-bit random binary number; calculating a first value based on a comparison between the share of the first and second n-bit random binary numbers; reconstructs an overall value of a comparison between the first and second n-bit random binary numbers; and determining a share of the random noise value based on the overall value and the plurality of function table segments.

Systems, methods, and software can be used to detect backdoors in binary software code. In some aspects, a method comprises: obtaining, by a server, binary software code corresponding to source code; generating, by the server, a backdoor abstraction of the binary software code; and generating, by the server, a backdoor risk assessment based on the backdoor abstraction of the binary software code.

A method for linearizing hydropower station output curves based on triangulation is proposed to address the technical challenge of linearizing three-dimensional output curves in reservoir optimal scheduling. This method first collects discrete data pairs of "head-generator flow-output" for hydropower station units, constructing a two-dimensional data list and an output list. Triangulation is then performed using the Delaunay function from the Python scipy library, generating a non-repeating triangular mesh, and constructing a dictionary containing the original data, the subdivision results, and data extrema. A mathematical model is then constructed, incorporating triangle selection constraints, centroid coordinate constraints, correlation constraints, and interpolation constraints, converting the nonlinear curve into a mixed-integer linear programming model. For scenarios with small variations in head and flow, calculations can be simplified by pre-setting envelope triangles. This invention eliminates the need for regular rectangular curves, significantly reduces binary variables, adapts to cascade reservoir group scenarios, and provides efficient solutions, offering reliable technical support for reservoir optimal scheduling.

Herein disclosed is a method for automatically automatically infer a recursive state machine (RSM) describing the space of acceptable input of an arbitrary binary program. This method automatically identifies atomic fields of fixed and variable lengths and syntactic elements, such as separators and terminators, and generalizes them into regular expression tokens. It constructs an RSM of tokens to represent structures such as arrays and records. Further, it constructs nested states in RSM to represent complex, nested structures. The RSM may serve as an independent parser for the program's acceptable input.

The application discloses a kind of program dependence cluster detection methods based on binary set, method is: with binary set form data structure definition dependent set, and input general set operation interface based on bit operation, obtain new dependent set data storage to each instruction node of general set operation interface program, and traverse each instruction node of program;Dependency relationship between instructions is calculated using general set operation interface, and dependency analysis data of each instruction node is obtained;According to the set content in the new set data, the dependency analysis results obtained are reorganized and classified, and the corrected dependency analysis results are obtained to correctly detect the program dependence cluster in program source code.The application defines set data structure with binary set, defines operation interface according to data structure, calculates dependence by calling interface, corrects dependence result, saves the correction result, thereby significantly reduces the space overhead problem during analysis.

The invention provides a hybrid programming code debugging method, system and device and a medium, and the debugging method comprises the steps: obtaining a code package which comprises a plurality of code files; wherein all code files of the code package are combined into a single execution program in the linking process, and the code package is compiled by adopting at least two programming languages; converting all the code files into intermediate language codes with a unified language format based on a preset code conversion format according to a sequence of executing the program; compiling the intermediate language code into a corresponding target binary code; and running the target binary code, and debugging the code file of the code package based on the running result of the target binary code. The method can support simultaneous mixed compiling and debugging of code files of high-level languages and code files of structured languages, so that the compiling process and the debugging efficiency are improved and optimized.

The context-based adaptive binary arithmetic code (CABAC) decoder includes a binary code decoding circuit and a context update circuit. The bin decoding circuit supports decoding multiple bins within a single cycle. The multiple binary codes include a first binary code and a second binary code. The bin decoding circuit generates a bin value for the first bin based on a first set of multiple contexts, a first range, and a first offset, and generates a bin value for the second bin based on a second set of multiple contexts, a second range, and a second offset. The context update circuit updates the first set of multiple contexts in response to the bin value of the first bin to generate a first set of updated contexts, and updates the second set of multiple contexts in response to the bin value of the second bin to generate a second set of updated contexts.

The invention discloses a compiling and explaining method, system and device for a high-level language of a functional block and a medium, and belongs to the technical field of industrial control systems.The compiling and explaining method comprises the steps that compiling rules are defined; reading a high-level language program file, and generating a binary operation code file according to the compiling rule; downloading the binary operation code file to a configuration interpreter for execution; wherein the step of generating the binary operation code file comprises the substeps of mapping a keyword of a high-level language into an operation code, and compiling a variable into an operand; according to the compiling and explaining method, system and device for the high-level language of the functional block and the medium, a set of compiling and explaining method is self-defined for compiling and explaining the high-level program language of a functional block combination, and program codes can be compiled into binary operation codes; the key codes and the operation codes are presented in the form of a hash table, so that the compiling and explaining speed is increased; the method has good trafficability, correctness and high efficiency.

A decomposition circuit of an incoming binary number for a binary arithmetic operator, the incoming number having an FP32 floating-point format, the decomposition circuit being hardwired to decompose the incoming number into a pair of high and low components in an internal format with a 9-bit exponent and a 12-bit significand; directly connect the bits of the significand of the high component respectively to a circuit providing the value of the implicit bit and to the most significant bits of the fractional mantissa of the incoming number; directly connect the bits of the significand of the low component respectively to the remaining bits of the fractional mantissa; assign to the exponent of the high component the exponent of the incoming number plus 12; and assign to the exponent of the low component the unchanged exponent of the incoming number.